Semiconductor memory apparatus simultaneously accessible via...

Static information storage and retrieval – Addressing – Plural blocks or banks

Reexamination Certificate

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C365S230060, C365S063000, C365S230010

Reexamination Certificate

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06868030

ABSTRACT:
A dual-port semiconductor memory apparatus constructed by a core circuit and a plurality of ports, different row blocks of which in the same column block of the core circuit are simultaneously accessible. Since each of the ports is provided with a global data bus, different row blocks of the same column block can be accessed via both ports by selectively activating a column line corresponding to a port and another column line corresponding to another port.

REFERENCES:
patent: 6041388 (2000-03-01), Anumula et al.
patent: 6421294 (2002-07-01), Hidaka
patent: 6438667 (2002-08-01), Shinozaki
patent: 2001-43674 (2001-02-01), None

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