Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2005-04-12
2005-04-12
Blum, David S. (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S684000
Reexamination Certificate
active
06879029
ABSTRACT:
When a semiconductor device having an element isolation structure is formed, first, a trench is formed in a wafer from a principal surface of the wafer, and the trench is filled with an insulating film. Then, the back surface of the wafer is polished so that the insulating film is exposed on the back surface. Accordingly, the insulating film penetrates the wafer from the principal surface to the back surface, thereby performing element isolation of the wafer. It is not necessary to use a bonding wafer. Thus, the method for manufacturing the semiconductor device is simplified.
REFERENCES:
patent: 3457123 (1969-07-01), Pul
patent: 4501060 (1985-02-01), Frye et al.
patent: 4784970 (1988-11-01), Solomon
patent: 4839309 (1989-06-01), Easter et al.
patent: 5091330 (1992-02-01), Cambou et al.
patent: 5204282 (1993-04-01), Tsuruta et al.
patent: 5449946 (1995-09-01), Sakakibara et al.
patent: 5459104 (1995-10-01), Sakai
patent: 5502289 (1996-03-01), Takiar et al.
patent: 5773352 (1998-06-01), Hamajima
patent: 6177359 (2001-01-01), Chen et al.
patent: 6225191 (2001-05-01), Ahlquist et al.
patent: 6303462 (2001-10-01), Gidon
patent: A-59-186345 (1984-10-01), None
patent: A-63-302552 (1988-12-01), None
patent: A-9-8126 (1997-01-01), None
patent: A-11-307488 (1999-11-01), None
patent: A-2000-195825 (2000-07-01), None
patent: A-2001-144173 (2001-05-01), None
Stanley Wolf,Silicon Processing for the VLSI Era, vol. 2: Process Integration, Lattice Press, pp. 69-71, 1990.
Yamazaki and Aoyama, “Analysis in Function of Polishing Pad Grooves in CMP Apparatus,” Jul. 19, 1999.
Mizuno Shoji
Ueda Nobumasa
Blum David S.
Denso Corporation
Posz Law Group , PLC
LandOfFree
Semiconductor device having element isolation structure does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having element isolation structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having element isolation structure will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3392981