Memory device having a thin top dielectric and method of...

Details Memory device having a thin top dielectric and method of... Memory device having a thin top dielectric and method of...

2005-03-01

2005-03-01

Auduong, Gene N. (Department: 2818)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185180, C365S185280

Reexamination Certificate

active

06862221

ABSTRACT:
A non-volatile memory device includes a semiconductor substrate and a source and drain within the substrate. A dielectric stack is formed over the substrate. The dielectric stack includes a thin top dielectric layer. A gate electrode is formed over the dielectric stack. The memory device is operative to perform a direct tunneling channel erase operation in which a pair of charge storing cells within a charge storing layer are erased via direct tunneling through the thin top dielectric layer.

REFERENCES:
patent: 3992701 (1976-11-01), Abbas et al.
patent: 6011725 (2000-01-01), Eitan
patent: 6215702 (2001-04-01), Derhacobian et al.
patent: 6434053 (2002-08-01), Fujiwara

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