Magnetic shielding for reducing magnetic interference

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Magnetic field

Reexamination Certificate

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Details

C257S422000, C257S425000, C257S427000, C365S158000, C438S003000

Reexamination Certificate

active

06867468

ABSTRACT:
A magnetic memory array comprises a plurality of magnetic memory cells, a magnetic shielding disposed adjacent to at least one of the magnetic memory cells to reduce magnetic interference with respect to another of the magnetic memory cells, and an insulator disposed as to separate at least a portion of the magnetic shielding from the at least one magnetic memory cell. The magnetic shielding may be a magnetic shield layer, patterned magnetic shield materials, and/or magnetic particles embedded in the insulator.

REFERENCES:
patent: 6509621 (2003-01-01), Nakao
patent: 6525957 (2003-02-01), Goronkin et al.

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