Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2005-07-26
2005-07-26
Yoha, Connie C. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185290, C365S185220
Reexamination Certificate
active
06922364
ABSTRACT:
A non-volatile semiconductor memory device includes: a cell array having electrically rewritable and non-volatile memory cells arranged to constitute at least one block with a plurality of pages; and a controller for controlling data erase by a page or sub-block with plural and continuous pages in the block, wherein the cell array has an erase control area set therein in which the number of data erase is stored as being expressed by a series of two-value data, the number of “0” data at lower bit side thereof indicating an accumulated value of the number of data erase in a block, and wherein the number of data erase is read out before data erase for a selected page in the block by a check-read operation in which plural pages are simultaneously set at a selected state, and renewed and written into the selected page after data erase.
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patent: 5691941 (1997-11-01), Imamiya et al.
patent: 6061280 (2000-05-01), Aritome
patent: 8-153398 (1996-06-01), None
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U.S. Appl. No. 10/621,451, filed Jul. 18, 2003, Tanaka.
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Yoha Connie C.
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