Routing for multilayer ceramic substrates to reduce...

Details Routing for multilayer ceramic substrates to reduce... Routing for multilayer ceramic substrates to reduce...

2005-04-26

2005-04-26

Parekh, Nitin (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S701000, C257S703000, C257S774000, C257S758000

Reexamination Certificate

active

06885098

ABSTRACT:
Aspects for routing in multilayer ceramic substrates that reduces via depth and avoids via bulge are described. The aspects include providing a multilayer ceramic substrate with at least two redistribution layers. Vias for each of a plurality of signal lines are jogged on at least a second redistribution layer of the at least two redistribution layers. Further, the aspects include providing the second redistribution layer no more than seven layers deep in the multilayer ceramic substrate.

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U. Ghoshal,Static ZT-Meter for Screening TE Samples, IBM Research, Austin Research Laboratory, Austin, TX 78758, two pages.

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