Vertical synchronizing signal detector

Details Vertical synchronizing signal detector Vertical synchronizing signal detector

1979-11-29

1981-09-22

Martin, John C.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

H04N 510

Patent

active

042913357

ABSTRACT:
A composite synchronizing signal is applied to the D input terminal of a D type flip-flop. A multiplied pulse obtained by multiplying a horizontal reference signal by 40 is applied to the C input terminal thereof, the horizontal reference being in phase with the horizontal synchronizing pulse of the composite synchronizing signal. A logic product of the output of a flip-flop and the multiplied pulse is produced. Pulses in the form of the logic product are counted during a period between two adjacent horizontal reference pulses. A detection pulse is generated which rises when the count exceeds 28 and ends with the end of the later one of two adjacent horizontal reference pulses. In response to this detection pulse, a vertical synchronizing pulse is detected. The timing of the ending of the detection pulse is not affected by noise pulses.

REFERENCES:
patent: 3925613 (1975-12-01), Kokado

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