Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2005-07-26
2005-07-26
Coleman, W. David (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S618000, C257S621000
Reexamination Certificate
active
06921961
ABSTRACT:
A semiconductor (10) has an active device, such as a transistor, with a directly underlying passive device, such as a capacitor (75, 77, 79), that are connected by a via or conductive region (52) and interconnect (68, 99). The via or conductive region (52) contacts a bottom surface of a diffusion or source region (22) of the transistor and contacts a first (75) of the capacitor electrodes. A laterally positioned vertical via (32, 54, 68) and interconnect (99) contacts a second (79) of the capacitor electrodes. A metal interconnect or conductive material (68) may be used as a power plane that saves circuit area by implementing the power plane underneath the transistor rather than adjacent the transistor.
REFERENCES:
patent: 5378914 (1995-01-01), Ohzu et al.
patent: 5426072 (1995-06-01), Finnia
patent: 5473181 (1995-12-01), Schwalke et al.
patent: 5614743 (1997-03-01), Mochizuki
patent: 5949140 (1999-09-01), Nishi et al.
patent: 6252300 (2001-06-01), Hsuan et al.
patent: 6355501 (2002-03-01), Fung et al.
patent: 6358828 (2002-03-01), Kadosh et al.
patent: 6500724 (2002-12-01), Zurcher et al.
Hayashi, Y. et al.; Fabrication of Three-Dimensional IC Using “Cumulatively Bonded IC” (Cubic) Technology, 1990 Symposium on VLSI Technology, pp. 95-96; CH2874-6/90/0000-0095, IEEE.
Hayashi, Y. et al.; A New Three Dimension IC Fabrication Technology, Stack Thin Film Dual CMOS Layers, IEDN, 1991, pp. 25.6.1-25.6.4, CH3075-9/91/0000-0657, IEEE.
Wu, Joyce H.; A High Aspect-Ratio Silicon Substrate-Via Technology and Applications, Master of Science in Electrical Engineering Thesis, Massachusetts Institute of Technology, Aug. 2000, pp. 1-90 (no p. 34 or 54), MIT.
Armacost, M. et al.; A High Realiability Metal Insulator Metal Capacitor for 0.18 μm Copper Technology, IEEE, 2000, 4 pages, IEEE.
Mendicino Michael A.
Min Byoung W.
Sanchez Hector
Yu Kathleen C.
Brewster William M.
Coleman W. David
Freescale Semiconductor Inc.
Hill Daniel D.
King Robert L.
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