Chip carrier substrate with a land grid array and external...

Details Chip carrier substrate with a land grid array and external... Chip carrier substrate with a land grid array and external...

2005-09-20

2005-09-20

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S692000, C257S694000, C257S695000, C257S696000, C257S697000, C257S698000, C257S704000

Reexamination Certificate

active

06946726

ABSTRACT:
A carrier for a semiconductor die has a substrate with a cavity formed in the substrate. The cavity has a bottom and sidewalls, and the sidewalls have a stepped tier. Electrically conductive contacts are disposed on an underside of the substrate. Electrically conductive tabs are disposed on the stepped tier, and electrically conductive external bond terminals are disposed on an edge of the substrate. Electrically conductive paths are formed in the substrate and electrically coupled between the electrically conductive tabs, the electrically conductive contacts, and the electrically conductive external bond terminals.

REFERENCES:
patent: 6747352 (2004-06-01), Huemoeller et al.

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