Structure for minimizing hot spots in SOI device

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Device protection

Reexamination Certificate

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Details

C257S174000, C257S359000, C257S360000, C257S363000, C257S365000, C257S355000, C257S357000, C257S358000

Reexamination Certificate

active

06844573

ABSTRACT:
In a high power input/output SOI semiconductor structure, the transistors thereof are laid out in a manner so that the high current density transistors, subject to the greatest heat buildup, are spaced apart in a manner as to avoid significant heat buildup.

REFERENCES:
patent: 5909387 (1999-06-01), Wong et al.
patent: 6569742 (2003-05-01), Taniguchi et al.
patent: 20020063284 (2002-05-01), Aono et al.
patent: 20020195663 (2002-12-01), Ramsbey et al.
patent: 20030178648 (2003-09-01), Bansal

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