Semiconductor memory device having a burst continuous read...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S200000, C365S194000

Reexamination Certificate

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06876580

ABSTRACT:
Several sense amplifiers detect data read from a memory cell of a bank in accordance with read address. Several first holding circuits individually hold data output from the sense amplifiers. Several second holding circuits hold data output from the corresponding first holding circuit after being delayed by time that the read address gains with respect to the burst address. Decoders individually supply data held in several second holding circuits to the corresponding line of a bus line.

REFERENCES:
patent: 5319759 (1994-06-01), Chan
patent: 5892713 (1999-04-01), Jyouno et al.
patent: 2001-167593 (2001-06-01), None

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