Nonvolatile memory, verify method therefor, and...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185280

Reexamination Certificate

active

06876581

ABSTRACT:
Provided is a nonvolatile memory that realizes a high-speed verify operation. During verify writing/erasing, the writing/erasing and reading are performed at the same time. As to a circuit that performs a verify operation, for instance, there is obtained a construction where the output from a sense amplifier (102) that performs reading is connected to a switch which switches an operation voltage applied to a memory cell in accordance with a verify signal Sv, and the verify operation is finished concurrently with having the verify signal Sv switched. By obtaining such circuit construction and simultaneously performing writing/erasing and reading, it becomes possible to perform high-speed verify writing/erasing.

REFERENCES:
patent: 5757700 (1998-05-01), Kobayashi
patent: 6288935 (2001-09-01), Shibata et al.
patent: 6686623 (2004-02-01), Yamazaki
patent: 9-293387 (1997-11-01), None

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