Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2005-07-12
2005-07-12
Malzahn, D. H. (Department: 2124)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S404000
Reexamination Certificate
active
06917955
ABSTRACT:
A real-valued FFT processor implements Bergland's real-valued FFT and uses unique interstage switching/delay modules to reduce pipeline latency. Modified hybrid floating point arithmetic is also employed to provide maximum SNR. The real-valued FFT processor is particularly suited for a DMT engine and, in a multichannel CO ADSL application, the DMT engine can be multiplexed between the channels to provide an economic, low cost CO solution.
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“Rapid Design of Application Specific FFT Cores”; by Ding et al., IEEE Transactions on Signal Processing, vol. 47, No. 5, May 1999; pp. 1371-1381.
“A Fast Fourier Transform Algorithm for Real-Valued Series”; by Glenn D. Bergland, Communications of the ACM, vol. 11, No. 10, Oct. 1968, pp. 703-710.
Analog Devices Inc.
Gauthier & Connors LLP
Malzahn D. H.
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