Programmable delay circuit within a content addressable memory

Details Programmable delay circuit within a content addressable memory Programmable delay circuit within a content addressable memory

2005-09-13

2005-09-13

Ho, Hoai (Department: 2827)

Static information storage and retrieval

Associative memories

Ferroelectric cell

C365S233100, C365S189020, C365S189050, C365S194000

Reexamination Certificate

active

06944040

ABSTRACT:
An apparatus having an output register coupled to a content addressable memory (CAM) array. The output register may be configured to output data based on a delayed clock signal. A programmable delay circuit may be coupled to receive a reference clock signal and generate the delayed clock signal using one or more delay elements.

REFERENCES:
patent: 4887279 (1989-12-01), Odenheimer
patent: 5146592 (1992-09-01), Pfeiffer et al.
patent: 5260888 (1993-11-01), Sharman
patent: 5448193 (1995-09-01), Baumert et al.
patent: 5504870 (1996-04-01), Mori et al.
patent: 5528186 (1996-06-01), Imamura
patent: 5790838 (1998-08-01), Irish et al.
patent: 5811985 (1998-09-01), Trimberger et al.
patent: 5857095 (1999-01-01), Jeddeloh et al.
patent: 5877714 (1999-03-01), Satoh
patent: 5892981 (1999-04-01), Wiggers
patent: 6031401 (2000-02-01), Dasgupta
patent: 6097724 (2000-08-01), Kartalopoulos
patent: 6101137 (2000-08-01), Roh
patent: 6111812 (2000-08-01), Gans et al.
patent: 6125217 (2000-09-01), Paniccia et al.
patent: 6127865 (2000-10-01), Jefferson
patent: 6130552 (2000-10-01), Jefferson et al.
patent: 6140854 (2000-10-01), Coddington et al.
patent: 6163502 (2000-12-01), Wong et al.
patent: 6181174 (2001-01-01), Fujieda et al.
patent: 6205083 (2001-03-01), Foss et al.
patent: 6212246 (2001-04-01), Hendrickson
patent: 6218864 (2001-04-01), Young et al.
patent: 6242955 (2001-06-01), Shen et al.
patent: 6253346 (2001-06-01), Kim et al.
patent: 6259467 (2001-07-01), Hanna
patent: 6271681 (2001-08-01), Cliff et al.
patent: 6275555 (2001-08-01), Song
patent: 6286118 (2001-09-01), Churchill et al.
patent: 6294938 (2001-09-01), Coddington et al.
patent: 6326812 (2001-12-01), Jefferson
patent: 6369624 (2002-04-01), Wang et al.
patent: 6459652 (2002-10-01), Lee et al.
patent: 6463109 (2002-10-01), McCormack et al.
patent: 6480557 (2002-11-01), Rog et al.
patent: 6785152 (2004-08-01), Yiu et al.
patent: 2001/0050585 (2001-12-01), Carr
patent: 2003/0081491 (2003-05-01), Mlki
patent: 2003/0107944 (2003-06-01), Foss et al.
patent: 2003/0208717 (2003-11-01), Klotchkov et al.
patent: 2004/0004902 (2004-01-01), Okuda et al.
patent: 2005/0017775 (2005-01-01), Starr
patent: 2005/0034006 (2005-02-01), Schoenfeld et al.

Affiliated with

Also associated with

Rating

Programmable delay circuit within a content addressable memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Programmable delay circuit within a content addressable memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programmable delay circuit within a content addressable memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3367380