Method of subdividing a wafer

Semiconductor device manufacturing: process – Semiconductor substrate dicing – With attachment to temporary support or carrier

Reexamination Certificate

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C438S113000, C029S413000

Reexamination Certificate

active

06756288

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the production of integrated circuits and, in particular, to a method of dicing a wafer, which comprises a plurality of individual circuit structures, so as to obtain very thin circuit chips.
BACKGROUND OF THE INVENTION AND PRIOR ART
Recently, there has been an increasing demand for thin chips on the one hand and high flexibility on the other so as to be able to use electronic circuit chips in a great variety of cases. The demand for thin circuit chips results, on the one hand, from increasingly complex electronic systems which should be composed of individual, fully processed chips that can be obtained from various manufacturers; simultaneously, these electronic systems should also be suitable for use in the field of high-frequency technology and they should take up little space. In order to keep the price of the whole system low, it should be possible to build up such chips, or modules including such chips, by means of conventional, economy-priced manufacturing methods.
One of the essential demands is, in particular, that pre-processed chips, which can be acquired as finished components, should be usable for the greatest possible number of applications so as to be e.g. independent of a single chip manufacturer, or so as to avoid the necessity of developing one's own chips, which would lead to higher prices in many cases, and so as to be able to concentrate exclusively on the interconnection of the individual chip components when a new system is being developed. Investigations have shown that e.g. in the case of simple silicon circuit chips up to 90% of the added value of the future product lie in the sphere of assembly and connection technologies, but not in the manufacture of the wafer from which the individual circuit chips can be produced by dicing.
It follows that pre-processed wafers must be used for obtaining the individual circuit chips by dicing.
U.S. Pat. No. 4,722,130 describes a method of producing semiconductor chips by dicing a semiconductor wafer. For this purpose, the front of the wafer has formed therein a lattice-shaped trench, whereupon an adhesive nylon foil, which is adherent on one side, is applied to the wafer front having the trench formed therein. Subsequently, the back of the support is ground so as to thin the wafer down to a defined thickness, the thickness of the thinned wafer being chosen such that the individual circuit chips, which have already been defined by the trenches, are interconnected by comparatively thin connection bridges. For separating the individual circuit chips, which are connected by connection bridges, the adhesive nylon foil is stripped off from one side of the wafer; this has effect that the connection bridges between the circuit chips break due to the pulling effect occurring when the adhesive foil is being stripped off. When the adhesive foil has been stripped off, the diced chips are still attached to an elastic support foil on the opposite side of the chip, which has been attached prior to stripping off the adhesive nylon foil. The elastic adhesive foil is then stretched transversally, whereby the spaces between the circuit chips are widened; this is easily possible, since the connection bridges have already been broken. The individual circuit chips can then be removed and inserted or used where they are needed. Circuit chips produced in this way have a thickness of approx. 160 &mgr;m; the starting material used was a standard GaAs wafer which had a thickness of 630 &mgr;m before it was thinned by grinding.
This method is disadvantageous insofar as it cannot be used for producing very thin and, consequently, also very sensitive chips. The mechanical thinning and the mechanical dicing of the chips by breaking the connection bridges entails the danger that the individual chips may be mechanically damaged or may have rough or even torn edges. In the case of chips having a thickness of 160 &mgr;m, such problems are not yet very grave. If the chips to be produced are, however, chips having a thickness of less than 50 &mgr;m, and, in particular, less than 20 &mgr;m, such tears may cause high production losses due to the mechanical processing of the back and the mechanical breaking of the connection bridges, since, due to the very small thickness, it may easily happen that active regions of the chips are impaired or even destroyed.
WO 99/25019 refers to a method of thinning semiconductor wafers. In a first step, a plurality of grooves is defined in the front of a semiconductor wafer. The grooves separate each integrated circuit such that it defines a separate chip. The grooves extend only partially into the front. When the grooves have been produced, a polyimide layer is applied so as to planarize the wafer provided with the grooves, the polyimide layer being used as a stress compensation layer for the subsequent thinning operation executed by means of grinding. This polyimide layer has applied thereto an adhesive layer by means of spraying or spinning. The wafer is then placed on a surface of a substrate in such a way that the adhesive layer faces said surface. In order to fix the wafer to the substrate, a predetermined pressure and a predetermined temperature are used so as to cure the adhesive layer. Following this, the wafer is thinned from the back by means of grinding. The thinned wafer is then placed on a needle block and immersed in a solvent so as to dissolve the adhesive layer; making use of a vacuum device, the individual chips are then removed from the needle block and placed in chip carriers.
U.S. Pat. No. 5,071,792 refers to a method of forming ultrathin integrated circuit chips. In a first step, grooves are produced in the front of the wafer. These grooves are then filled with a hard material acting as a grinding stop. This material is then planarized and a wax is applied thereto, which provides a temporary adhesion between a passivation coating and the planar surface of an intermediate support. Following this, the back of the wafer is ground so as to dice the chips. The comparatively hard material in the grooves acts here as a grinding stop. After the grinding process, the grinding stop material is removed from the grooves. In order to obtain the individual chips, the wax film is finally melted.
SUMMARY OF THE INVENTION
It is the object of the present invention to provide a reasonably-priced but still reliable method of dicing a wafer for obtaining very thin circuit chips.
In accordance with the present invention, this object is achieved by a method of dicing a wafer which comprises a plurality of circuit structures, said method comprising the steps of: defining a trench between at least two circuit structures on one face of the wafer; forming the trench down to a defined depth by means of dry etching; fixing to said one face of the wafer a re-detachable intermediate support composed of a fixed intermediate support substrate and an adhesive medium which is applied to said intermediate support substrate and which can specifically be modified in terms of its adhesive strength and which can specifically be modified in terms of its adhesive strength, said adhesive medium being an adhesive foil which is adherent on both sides, the side of the adhesive foil which is secured to said one face of the wafer having the variable adhesive strength, and said adhesive strength being adapted to be reduced by heating or by applying ultra violet radiation; thinning the wafer by dry-etching, which is secured to the intermediate support, from the opposite face so as to obtain individual circuit chips which are held by the intermediate support; and removing the individual circuit chips from the intermediate support by heating said intermediate support or by applying ultra violet radiation to the adhesive foil so as to reduce the adhesive strength of said adhesive foil to such an extent that the circuit chips can be detached from the intermediate support.
The present invention is based on the finding that, for obtaining very thin circuit chips, mechanical effects must be e

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