Data processing: measuring – calibrating – or testing – Testing system
Reexamination Certificate
2001-11-21
2004-06-08
Barlow, John (Department: 2863)
Data processing: measuring, calibrating, or testing
Testing system
Reexamination Certificate
active
06748338
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method and apparatus for testing a communication chip, and particularly to a method and apparatus for testing eye diagram characteristics of a communication chip.
2. Description of Related Art
For communication chips or system single chips, it is necessary to test the quality of eye diagram characteristics for the output signals of the Guassian Low Pass Filter (GLPF) of the transmitter before leaving the factory so as to pick out defective products. In the stage of research and engineering verification, engineers always use an oscilloscope or an RF analyst (such as HP 71501A) to check by hand if the eye diagram characteristics of the communication chips fit the requirement of specifications. However, in the stage of testing products, if the work is done by hand, it will slow down the output of products and increase the test cost.
FIG. 1
shows a prior art testing apparatus, including a mainframe
11
, an RF analyst
15
, a chip under test
14
and a mechanical arm
12
. The chip under test
14
is placed on a testing plate
13
of the mechanical arm
12
. First, the mainframe
11
issues a precondition to the chip under test
14
, and drives the chip under test
14
output GLPF signals to the RF analyst
15
. The RF analyst
15
transfers the GLPF signals into an eye diagram, and the workers check if the chip under test
14
fits specifications through a screen examination.
However, the above method cannot be made automatic so that a testing cycle of a chip will take a lot of time and lessen the output of products. Second, the RF analyst
15
is so expensive that the total testing cost is high. Third, due to man's neglects or an inaccurate comparison under an eyesight limitation, the defective chips cannot always be picked out by hand and errors are bound to happen.
To eliminate the disadvantages of the prior art, the present invention proposes a novelty method and apparatus for testing eye diagram characteristics to overcome the above drawbacks.
SUMMARY OF THE INVENTION
A main object of the present invention is to provide an automatic and a cost-down method and apparatus for testing eye diagram characteristics.
The second object of the present invention is to provide a method and apparatus for fast testing eye diagram characteristics.
To obtain the above purpose, the present invention does not utilize an RF analyst as used in prior art. On the contrary, the present invention directly sends a precondition from a mainframe to a chip under test, and the GLPF signals are read out from the chip under test. After digitalizing and normalizing the GLPF signals, an eye diagram program stored in the mainframe is executed and the eye diagram is reconstructed. Next, a software analyzer is used to compute an error between the eye diagram parameters and predefined specifications, and determining if the chip under test is in an allowable range of the specification according to the computed error. If the computed error is beyond the allowable range, the chip under test will be discarded.
REFERENCES:
patent: 4268861 (1981-05-01), Schreiber et al.
patent: 5327091 (1994-07-01), Loughry
patent: 5533066 (1996-07-01), Yamaguchi et al.
patent: 5909516 (1999-06-01), Lubin
patent: 6137904 (2000-10-01), Lubin et al.
patent: 6522776 (2003-02-01), Ehrichs
patent: 2002/0011835 (2002-01-01), Yamazaki
patent: 1143654 (2001-10-01), None
Barlow John
Lau Tung S
Winbond Electronics Corporation
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