Thermally enhanced semiconductor build-up package

Details Thermally enhanced semiconductor build-up package Thermally enhanced semiconductor build-up package

2002-02-15

2004-06-15

Ngo, Hung V. (Department: 2831)

Electricity: conductors and insulators

Boxes and housings

Hermetic sealed envelope type

C257S700000, C257S704000, C257S778000, C257S738000

Reexamination Certificate

active

06750397

ABSTRACT:

FIELD OF THE INVENTION
The present invention is relating to a semiconductor package, more particularly to a thermally enhanced semiconductor build-up package with a metal carrier.
BACKGROUND OF THE INVENTION
The chip is trending to small size and high density (having lots of terminals) for CSP (chip scale package) or FC (flip chip) package. Therefore, the intervals between adjacent contacts of die are evolved to become very small, resulting in difficulty of planting the solder balls and causing the problem of surface mounting fail. So that reliability and yield of semiconductor packages would decrease greatly, and the technology of CSP (chip scale package) or FC (flip chip) package is unable to be worked out.
In order to solve the problems mentioned above, a semiconductor package is brought up from U.S. Pat. No. 6,271,469 “direct build-up layer on an encapsulated die package”. As shown in
FIG. 1
, the semiconductor build-up package
100
comprises a die
110
, an encapsulating material
120
and a plurality of dielectric layers
131
and
132
. The die
110
has an active surface
111
forming a plurality of contacts
114
. The encapsulating material
120
covers the passive surface
112
and sides
113
of the die
110
for protecting the die
110
. The surface of the encapsulating material
120
is coplanar to the active surface
111
of the die
110
for providing a planar area that is necessary for build-up package. The first dielectric layer
131
is formed on the area that is defined by the die
110
and the encapsulating material
120
, such as silicon oxide or silicon nitrogen. The first dielectric layer
131
has a plurality of conductive traces
141
that are conductive metals such as copper, aluminum, or alloys thereof. The second dielectric layer
132
is formed above the first dielectric layer
131
and conductive traces
141
and has a plurality of conductive plugs
142
. The conductive pads
143
are formed on the second dielectric layer
132
. A conductive path is constituted by one of conductive traces
141
and the corresponding conductive columns
142
for electrically connecting the contact
114
of the die
110
with the corresponding conductive pad
143
. A solder mask
150
is formed on the second dielectric layer
132
. Conductive pads
143
are exposed from the solder mask
150
for planting solder balls
160
. Therefore, the contacts
114
of the die
110
may fan out to the conductive pads
143
through the first dielectric layer
131
and the second dielectric layer
132
, so that it is easy for planting the solder balls
160
and surface-mounting to PCB (print circuit board), etc. However, due to the die
110
of high density (with a lot of terminals), such as CPU chip, a mass of heat is generated from the die
110
, so that the heat-dissipation of the package
100
should be improved. The encapsulating material
120
is made of resin etc, that is not excellent in heat-dissipation, so that the die
110
is easy to damage because overheat causes electromigration.
SUMMARY
The main object of the present invention is to provide a semiconductor build-up package. The package comprises a die, a metal carrier and a plurality of dielectric layers. The metal carrier carries the die has a surface for building up a plurality of dielectric layers in order to improve the heat-dissipation of the package.
The secondary object of the present invention is to provide a semiconductor build-up package with vertically conductive columns on the bonding pads of the die. The conductive columns of each dielectric layer, such as copper, aluminum or their alloys, may electrically connect with those conductive columns of adjacent dielectric layer mutually. Some of conductive columns are vertically bonded on the conductive columns of adjacent dielectric layer.
According to the present invention, a semiconductor build-up package comprises a die, a metal carrier and a plurality of dielectric layers. The die has an active surface with bonding pads and a passive surface. The metal carrier has a surface with a cavity for accommodating the die. It is better that the surface of the metal carrier is coplanar to the active surface of the die for providing an area that is necessary to build up a plurality of dielectric layers. The dielectric layers are formed in turn on the area formed by the active surface of the die and the surface of the metal carrier. A plurality of conductive pads are formed on the surface of the dielectric layer of the most upper layer. Each dielectric layer has conductive columns for electrically connecting the corresponding bonding pads of the die with the conductive pads. The conductive columns are made of copper, aluminum or their alloys for providing electrical connection. Further, a plurality of solder balls, bumps or pins are formed on the conductive pads for surface mounting the semiconductor build-up package to a print circuit board, etc. Therefore, a semiconductor package with build-up dielectric layers is especially applied to a semiconductor package with a lot of terminals. By means of conductive traces and conductive columns, the bonding pads of the die fan out to the conductive pads with larger intervals so that it is uneasy to cause the problems of short circuit, etc while the packaging process, planting the solder balls or surface-mounting. Besides, The metal carrier is made of copper, aluminum or other metals with excellent heat-dissipation efficiency and contacts the passive surface and the sides of the die for improved heat dissipation, so the heat generated from die is dissipated fast through the metal carrier for keeping the die from damaging and acting abnormally due to overheat.


REFERENCES:
patent: 5371404 (1994-12-01), Juskey et al.
patent: 5422513 (1995-06-01), Marcinkiewicz et al.
patent: 6201701 (2001-03-01), Linden et al.
patent: 6271469 (2001-08-01), Ma et al.
patent: 6492723 (2002-12-01), Suyama

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