Electric power conversion systems – Frequency conversion without intermediate conversion to d.c. – With automatic frequency control
Reexamination Certificate
2002-11-12
2004-08-17
Nguyen, Matthew V. (Department: 2838)
Electric power conversion systems
Frequency conversion without intermediate conversion to d.c.
With automatic frequency control
Reexamination Certificate
active
06778418
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a power-supply voltage frequency control circuit for controlling a clock frequency of a system clock and a power-supply voltage to be supplied to a target circuit receiving the supply of a predetermined power-supply voltage and performing predetermined processing in synchronization with a system clock.
2. Description of the Related Art
The power consumption of an electronic circuit system is proportional to the clock frequency and the square of a power-supply voltage. Thus, by changing the clock frequency in accordance with a load of tasks to be processed based on the operating state of the system and supplying power-supply voltage in accordance thereto, the power consumption can be reduced.
Specifically, when the load is heavy, that is, when there are many tasks for the target circuit to process, a high power-supply voltage V
DD
is supplied and a high speed clock frequency is switched to.
When the load is light, that is, when there are few tasks for the target circuit to process, a low speed clock frequency is switched to and a low power-supply voltage V
DD
is supplied.
For example, when the lower limit power-supply voltage V
DD
able to assure operation of the target circuit at the time of a clock frequency f of f
1
is V
1
and the lower limit power-supply voltage V
DD
able to assure operation of the target circuit at the time of a clock frequency f of f
2
(<f
1
) is V
2
(<V
1
), a power-supply voltage V
DD
of V
1
or more is supplied when the system clock frequency f is f
1
, while a power-supply voltage V
DD
of V
2
or more is supplied when the system clock frequency f is f
1
which is lower than f
2
.
By doing this, excessive power consumption can be suppressed.
However, a certain period of time is necessary to change the power-supply voltage V
DD
. For example, as shown in
FIG. 18A
to
FIG. 18C
, up until the time T
1
when the power-supply voltage V
DD
is converged to V
1
, a clock of a frequency f
1
is supplied to the target circuit, but a power-supply voltage V
DD
for assuring the operation thereof is not supplied, so the operation of the target circuit is not assured.
Accordingly, as explained above, in the electronic circuit system of the related art, there is the disadvantage that sometimes the operation cannot be assured when operating the system while switching the frequency.
Also, when changing the clock frequency in accordance with the load of tasks to be processed by the target circuit based on an operating state of the system as explained above and supplying a power-source voltage V
DD
in accordance thereto, a CPU or other control circuit gives an instruction every time, whereby a clock supply circuit capable of supplying a clock of a variable clock frequency or a power-supply circuit capable of supplying a variable power-source voltage changes the clock frequency f and the power-supply voltage V
DD
.
In this case, the CPU is generally configured to give an instruction at a predetermined time. To the predetermined time, however, interruption processing by a timer becomes necessary. In this case, the CPU suspends the processing of the tasks it should be performing.
Accordingly, in an electronic circuit system of the related art, when controlling the clock frequency and power-supply voltage in accordance with a fixed schedule, there is the disadvantage that the processing of tasks is suspended each time and an overhead of processing for sending instructions to the clock supply circuit and the power-supply voltage supply circuit occurs.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a power-supply voltage frequency control circuit capable of assuring operation of a target circuit when changing a clock frequency in accordance with a load of tasks to be processed and supplying a power-supply voltage in accordance thereto.
A second object of the present invention is to provide a power-supply voltage frequency control circuit capable of suppressing an occurrence of overhead in processing and reducing processing of a control system of a target circuit when controlling a clock frequency and a power-supply voltage in accordance with a fixed schedule.
To attain the above objects, according to a first aspect of the present invention, there is provided a power-supply voltage frequency control circuit comprising a clock supply circuit capable of supplying system clocks of a plurality of clock frequencies and supplying a system clock having a clock frequency in accordance with a first control signal to a target circuit performing processing in synchronization with the system clock; a power-supply voltage supply circuit for supplying a power-supply voltage of a value in accordance with a second control signal to the target circuit; and a control means for, when giving an instruction for raising the frequency, instructing the power-supply voltage supply circuit by the second control signal to raise the power-supply voltage in advance to one by which operation of the system can be assured for the frequency to be changed to next and then instructing the clock supply circuit by the first control signal to raise the frequency.
Preferably, the control means, when giving an instruction for lowering the frequency, instructs the clock supply circuit by the first control signal to lower the frequency and instructs the power-supply voltage supply circuit by the second signal to lower the power-supply voltage to one by which operation of the system can be assured for the frequency to be changed.
According to a second aspect of the present invention, there is provided a power-supply voltage frequency control circuit comprising a clock supply circuit capable of supplying system clocks of a plurality of clock frequencies and supplying a system clock of a clock frequency in accordance with a first control signal to a target circuit performing processing in synchronization with the system clock; a power-supply voltage supply circuit for supplying a power-supply voltage of a value in accordance with a second control signal to the target circuit; and a control means for outputting the first control signal to the clock supply circuit and outputting the second control signal to the power-supply voltage supply circuit by following an instruction of a frequency change value and change time from the target circuit.
Preferably, the control means calculates a power-supply voltage value to be supplied to the target circuit from the frequency change value instructed by the target circuit and instructs the power-supply voltage supply circuit by the second control signal.
Alternatively, the control means has a table of the relationship of a frequency value of a system clock to be supplied to the target circuit and a power-supply voltage value to be supplied to the target circuit, selects a voltage in accordance with an instructed frequency value, and instructs the power-supply voltage supply circuit by the second control signal.
Alternatively, the control means performs a frequency-voltage conversion from an instructed frequency value of a system clock to be supplied to the target circuit and instructs a power-supply voltage value obtained by the conversion to the power-supply voltage supply circuit by the second control signal.
Alternatively, the circuit further comprises a timer able to be set with a time to be clocked by the control means and outputting a coincidence signal clocking the set time, and the control means sets a frequency change time instructed by the target circuit to the timer and outputs the first control signal to the clock supply circuit when receiving as an input the coincidence signal from the timer.
Alternatively, the control means compares a frequency of the clock supplied by the clock supply circuit with the frequency change value instructed by the target circuit, judges whether to raise or lower the frequency in accordance with the comparison result, and instructs the clock supply circuit by the first control signal.
More preferably, when j
Kananen Ronald P.
Nguyen Matthew V.
Rader & Fishman & Grauer, PLLC
Sony Corporation
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