Matrix display device providing a larger connection pitch

Details Matrix display device providing a larger connection pitch Matrix display device providing a larger connection pitch

2001-05-09

2004-08-03

Saras, Steven (Department: 2697)

Computer graphics processing and selective visual display system

Display driving control circuitry

Intensity or color driving control

C345S087000, C345S695000, C345S215000

Reexamination Certificate

active

06771282

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a matrix display device, representative of which is an active matrix liquid crystal display device, and in particular to a matrix display device capable of color display.
BACKGROUND OF THE INVENTION
In a conventional active matrix display device for example, an externally inputted video signal which has an arrangement of M×3 (RGB)×N is displayed, as shown in
FIG. 10
, by a matrix display section (display element)
58
which is made up of M×3 signal lines, N scanning lines, and display cells each of which is a portion enclosed by the signal lines and the scanning lines. Note that, in “M×3 (RGB)×N”, “3 (RGB)” refers to a numerical value 3 according to three different colors: red (R), green (G) and blue (B).
Further, in this active matrix display device, as shown in
FIG. 9
, each one pixel
51
is made up of three cells
52
(
52
a
to
52
c
), one of which is red (R), another is green (G) and the other is blue (B). In each cell
52
, a ratio of the length in a horizontal direction (“horizontal length”, hereinafter) to the length in a vertical direction (“vertical length”, hereinafter) is as follows: the horizontal length:the vertical length=1:3. Namely, as shown in
FIG. 9
, when the horizontal length of the cell
52
is Sx
2
, and the vertical length thereof is Sy
2
, Sx
2
:Sy
2
=1:3.
Further, since each pixel
51
includes three cells
52
disposed side by side in the horizontal direction, the pixel
51
has the shape of a square. More specifically, as shown in
FIG. 9
, when the horizontal length of the pixel
51
is Px
2
, and the vertical length thereof is Py
2
, Px
2
(=3×Sx
2
):Py
2
(=Sy
2
)=1:1. With this arrangement, when displaying a “circle” for example, display shows the “circle” but not an “ellipse”.
Furthermore, a wiring pitch of the M×3 signal lines
53
and the N scanning lines
54
that are disposed in a matrix shows the following ratio: a pitch of the signal line
53
:a pitch of the scanning line
54
=1:3.
The foregoing conventional matrix display device that includes the pixel
51
, the signal line
53
and the scanning line
54
has an arrangement as shown in
FIG. 10
, for example.
FIG. 10
shows the case where the pixels
51
are provided, the number of which is calculated as follows: M (the number of pixels in a horizontal direction)×N (the number of pixels in a vertical direction). An arrangement shown in
FIG. 10
is as follows: each signal line
53
is connected to a signal line driving circuit
55
; each scanning line
54
is connected to a scanning line driving circuit
56
; the signal line driving circuit
55
is supplied with a video signal and a control signal from a control circuit
57
; and the scanning signal line driving circuit
56
is supplied with a control signal from the control circuit
57
.
Here, for ease of explanation,
FIG. 11
shows a low-resolution matrix display device in which the number of the pixels
51
is calculated as follows: M (horizontal direction)=3, and N (vertical direction)=2. This display device has a basic arrangement as with FIG.
10
. Further,
FIG. 12
is a timing chart of various signals in the signal line driving circuit
55
shown in FIG.
11
.
As shown in
FIG. 12
, the signal line driving circuit
55
, in a timing {circle around (1)} of DOT_CK, makes sampling of each cell
52
of the pixel
51
, for example, in an upper left-hand corner in
FIG. 11
, that is, video data of three individual systems respectively corresponding to R (
0
,
0
), G (
0
,
0
) and B (
0
,
0
). The sampling data are applicable to signals of three systems Sr(
0
), Sg(
0
) and Sb(
0
) to be outputted to the signal line
53
. Likewise, at timings {circle around (2)} and {circle around (3)}, there is made sampling of video data of three individual systems respectively corresponding to R (
1
,
0
), G (
1
,
0
) and B (
1
,
0
), and R (
2
,
0
), G (
2
,
0
) and B (
2
,
0
). These sampling data correspond to signals of three systems Sr(
1
), Sg(
1
) and Sb(
1
), and Sr(
2
), Sg(
2
) and Sb(
2
), respectively, that are outputted to the signal line
53
.
Thus, the signal line driving circuit
55
finishes sampling of one scanning portion of video data (video data of the three individual systems) which corresponds to a scanning line G(
0
) (scanning line
54
), thereafter outputting the signals Sr, Sg and Sb of the three individual systems corresponding to these sampling data to each signal line
53
. Likewise, the signal line driving circuit
55
makes sampling of one scanning portion of video data (video data of the three independent systems) which correspond to a next scanning line G(
1
) at timings {circle around (4)}, {circle around (5)} and {circle around (6)}, so as to output the signals Sr, Sg and Sb of the three independent systems corresponding to these sampling data to each signal line
53
.
Since the video signal is a digital signal, in the case of an arrangement of
FIG. 11
, when, for example, a video signal of RGB 8 bits is adopted, 3 systems (Sr, Sg and Sb)×8 bits, thereby requiring 24 sampling circuits.
However, in the foregoing conventional arrangement, a signal line has a pitch which is three times smaller than that of the scanning line
54
and is an extremely small pitch. Therefore, when attempting to realize a high-definition panel, from the view points of a panel design rule and/or a driver connection rule, a high-definition panel cannot be developed.
For example, when designing a high-definition panel having display density of about 200 dpi based on the foregoing conventional arrangement, one pixel
51
becomes 120 &mgr;m□ (120 &mgr;m×120 &mgr;m), and therefore, each cell
52
and each signal line
53
has the pitch of 40 &mgr;m. Further, commonly, the pitch of connection between each output terminal of the signal line driving circuit
55
and each signal line
53
is measured the same as the wiring pitch of the signal line
53
. However, according to the currently existing technology, the acceptable finest pitch in the connection is 50 &mgr;m, and therefore, the pitch of about 40 &mgr;m as above cannot be adopted.
Note that, Japanese Unexamined Patent Publication No. 95027/1996 (Tokukaihei 8-95027 published on Apr. 12, 1996) discloses an arrangement in which a ratio of a cell pitch in a horizontal direction to a cell pitch in a vertical direction is set at a predetermined value. Japanese Unexamined Patent Publication No. 72826/1995 (Tokukaihei 7-72826 published on Mar. 17, 1995) discloses an arrangement in which cells composing one pixel are disposed in the shape of a letter L. However, neither of these techniques aims to loosen the tight pitch of a signal so as to attain high-definition display, and moreover, simply using these techniques cannot solve the foregoing problems.
For example, the following process is disclosed in the Publication No. 72826/1995. When performing display of a video signal having the resolution (800×3(RGB)×600) by a display device having the different resolution of XGA (1024×3(RGB)×768) for example, the pseudo-interpolation and enlargement of the resolution causes the edges of an image to be unclear. Therefore, in this conventional invention, though one pixel is normally made up of three cells R, G and B, yet the number of cells to compose a pixel is variable in accordance with the inputted resolution, thereby preventing the edges of an image from being unclear in a plurality of resolutions. More specifically, in the same Publication, when inputting a signal having the resolution of FIG.
2
(A), one pixel is given one of each of the cells R, G and B. Further, when inputting a signal having the resolution of FIG.
2
(B), one pixel is given two of each of the cells R, G and B, namely, six cells in total.
SUMMARY OF THE INVENTION
In view of the foregoing problems, it is an object of the present invention to provide a matrix display device capable of high-definition display that was not reached b

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