Registers – Records – Conductive
Reexamination Certificate
2003-05-09
2004-08-31
Le, Thien M. (Department: 2876)
Registers
Records
Conductive
Reexamination Certificate
active
06783078
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of information processing and storage, and, more particularly, to smart card systems and related methods.
BACKGROUND OF THE INVENTION
Smart cards are becoming increasingly more popular for security and personal identification applications. For example, smart cards are currently being used for storing sensitive data such as medical records, banking information, etc. In perhaps their most common form, smart cards have a card body which resembles a credit card in size, shape, and thickness, and they may even be made out of similar materials, such as plastic. Yet, rather than simply having a magnetic stripe to store sensitive information (e.g., account numbers, user identification, etc.) as standard credit cards do, smart cards generally include an integrated circuit (IC). The IC not only includes a non-volatile memory for storing such sensitive information, but it may also include a microprocessor for processing this information and communicating with a host device via a card reader, for example. Accordingly, not only can smart cards store more information than magnetic stripe cards, but they also have much greater functionality.
Various protocols have emerged to standardize smart card operation and communications. One of the earliest of these was developed by the International Organization for Standardization (ISO) and is known as the ISO7816-X protocol. In particular, this protocol is set forth in ISO documents ISO 7816-1 (Physical Characteristics), ISO 7816-2 (Dimensions and Locations of Contacts), ISO 7816-3 (Electronic Signals and Transmission Protocols), and ISO 7816-10 (Electronic Signals and Answer to Reset for Synchronous Cards), for example, all of which are hereby incorporated herein in their entirety by reference.
Furthermore, in response to the increasing popularity of the universal serial bus (USB) architecture, increasing numbers of smart cards continue to be developed which operate in accordance with the USB protocol. This protocol is set forth in the Universal Serial Bus Specification, Revision 2.0, Apr. 27, 2000, published by USB Implementers Forum, Inc., which is hereby incorporated herein in its entirety by reference. The USB architecture is particularly advantageous in that it provides a standard “plug and play” interface for devices external to a computer, for example. That is, external peripheral devices can be relatively quickly and easily installed and removed from a computer without having to open or power down the computer.
While the ISO7816-X and USB protocols provide certain basic tools and rules for developing smart card systems, there still remain many practical challenges to smart card implementation. One such challenge is the testing of smart card IC designs. That is, in addition to the microprocessor and non-volatile memory, numerous other components are typically included in a smart card IC for communicating with the host device and performing smart card operations. For example, these additional components may include transceivers, transmission buffers, interface circuitry, random access memory (RAM) for the microprocessor, internal clocks, state machines, etc. Thus, a relatively large number of tests may be required to ensure that each of these components operates as intended under different operating constraints or with different data sets.
Perhaps the most common approach for testing the operation of IC components is to use manufacturing-grade IC test machines. While such test machines are capable of testing many of the above circuit components, these machines can cost hundreds of thousands or even millions of dollars to purchase and operate. Thus, it will typically be practical to have only a very limited number of such test machines. Yet, to test most or all of the above IC components for each IC manufactured can be cost prohibitive because this requires that each IC spend a relatively long time on the tester. This, in turn, slows production and thus increases per unit costs. As such, a minimal set of operating tests may be defined to ensure basic components are operating correctly, but this could mean many other functions will go untested.
Because of the computing power resident in the microprocessor of the smart card IC, certain testing operations may be performed internally to the smart card. By way of example, U.S. Pat. No. 6,157,966 to Montgomery et al. is directed to an ISO7816 type smart card which uses debugging applications resident on the card to aid in the development of smart card programs. The debugging applications can provide internal state and runtime information, such as for a memory test. Results from the test are then output and may include a number of rows or columns of a memory unit that passed the test.
Despite the advances provided by the above-noted approach, further improvements in smart card testing may be needed in certain areas. One such area is USB smart cards, for example, which are continuing to gain popularity and will likely need to be manufactured in ever increasing quantities.
Another challenge in smart card development is protecting communications between the smart card and host device from would-be hackers or eavesdroppers. Encryption is perhaps the most widely used approach for securing data transmissions, as it is used in numerous applications such as wireless and wired telephone networks, satellite communications, and computer networks, to name a few. Smart cards also have been developed which incorporate encryption techniques. By way of example, U.S. Pat. No. 6,463,537 to Tello discloses a secure computer that will not boot up or recognize any data storage or communication peripheral devices without a matching personalized smart card. The card has an encrypted digital signature stored therein which complements an encrypted digital signature stored in the computer. An encryption algorithm is also used for encrypting data sent between the smart card and the computer.
While encryption does provide an increased level of protection against would-be hackers, their sophistication and ability to crack encryption algorithms continues to improve. As such, further security protection is always desirable, particularly where extremely sensitive information, such as health records or financial data, is to be protected.
One additional challenge for smart card development is to increase the efficiency of communications between a host device and a smart card, which often shares the host device's communications bus with other peripheral devices, for example. Numerous approaches to increasing bus utilization have been developed, one of which is set forth in U.S. Pat. No. 6,006,303 to Barnaby et al. This patent is directed to a shared access prior encoding/decoding and arbitration scheme which takes into account varying device requirements, such as latency, bandwidth, and throughput, which are stored and dynamically updated based upon changing access demand conditions. That is, these requirements are prioritized to determine which devices get access to shared access resources at a given time. The patent notes that the invention may be implemented within an IC chip for use in smart card readers, for example.
While such prioritization approaches may be advantageous in certain applications, they may not be desirable or even practical in other applications. As such, different approaches may be more appropriate for increasing bus utilization in some smart card applications.
SUMMARY OF THE INVENTION
In view of the foregoing background, it is therefore an object of the present invention to provide an integrated circuit for a universal serial bus (USB) smart card with enhanced testing features and related methods.
This and other objects, features, and advantages in accordance with the present invention are provided by an integrated circuit for a smart card which may include a USB transceiver and a microprocessor connected to the USB transceiver and operable in a test mode and a user mode. The microprocessor, when in the test mode, upon receiving at least on
Jorgenson Lisa K.
Le Thien M.
Nowlin April
Regan Christopher F.
STMicroelectronics Inc.
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