Multi-pass phase tracking loop with rewind of current...

Demodulators – Phase shift keying or quadrature amplitude demodulator

Reexamination Certificate

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C329S307000, C375S324000, C375S326000, C375S329000, C375S376000

Reexamination Certificate

active

06781447

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to communication systems. In particular, the present invention relates to demodulators which use a phase tracking loop (PTL) to track the phase of a modulated signal waveform.
2. Discussion of the Related Art
In burst communication systems, particularly digital communication systems comprising a communication transmitter for digital data transmission and a communication receiver for digital data reception via a channel, it is known to impress intelligent information to be conveyed onto a carrier for transmission by one of many different modulation techniques, including binary phase shift keying (BPSK) modulation or quaternary phase shift keying (QPSK) modulation. The burst consists of a preamble portion and a data portion. A demodulator in the communications receiver includes a phase tracking loop (PTL) which determines an initial estimate of the phase of the modulated signal using the preamble portion. The phase tracking loop is initialized with the phase estimate and thereafter constantly calculates an estimate of the transmitter's phase so that it continuously tracks the incoming signal during reception and demodulation of the data portion.
Conventionally, a demodulator uses a phase tracking loop to track and coherently demodulate the modulated signal waveform received from a transmitter so that it may be transformed back into the fixed phase space of the transmitter. There are a number of different types of phase tracking loops employing phase locked principles such as squaring loops, Costas tracking loops, and decision-directed feedback loops for performing phase tracking of either a BPSK or QPSK modulated signal. A commonly used method for performing this type of phase tracking is a digital decision directed phase locked loop (DD-PLL). The basic principle of decision directed phase locked loops (DD-PLLs) is well known as described in the classic “
Telecommunication Systems Engineering
” text by William C. Lindsey and Marvin K. Simon, originally published by Prentice-Hall in 1973, and the “
Digital Communications
” text by Kamilo Feher, originally published by Prentice-Hall in 1983 and republished by Noble Publishing Corp. in 1997. Generally, the input to a digital decision directed phase locked loop (DD-PLL) typically consists of only the phase angles of a sequence of complex data sample pairs obtained by down converting the incoming BPSK or QPSK modulated signal to a baseband quadrature (orthogonal) pair, 10 digit combination, passing these through matched filters and sampling the results at the symbol rate. This sampled pair may be considered as a complex variable in rectangular form. The complex variable is converted to polar form to produce the equivalent variable pair. The apparent incoming phase is referenced to the currently estimated phase (i.e. the tracked phase) to form the phase difference. The phase difference between the incoming phase and the estimated phase is influenced by the true difference between the phase systems of the transmitter and the receiver, by phase and thermal noise present at the receiver, and also by the symbol's data content which changes the angle by a multiple of &pgr;/2 for QPSK or of &pgr; for BPSK. The polar form is then transformed back into the rectangular form, for subsequent processing, including soft decision decoding when error control is being utilized.
In conventional phase tracking circuits, the effect of the data content on the phase difference between the incoming phase and the estimated phase is compensated by making a “hard” decision on the data content of each individual BPSK or QPSK symbol on the rectangular coordinates. A standard phase detector generates phase error measurements for each BPSK or QPSK symbol, based on the hard decision of each symbol. In the absence of noise in the baseband quadrature pair, the estimated phase decision, which is based on each individual BPSK or QPSK symbol, is always correct so that the resultant phase error measurement equals the true difference between the phase systems of the transmitter and the receiver. The value of the resultant phase error measurement is then filtered to yield an updated estimate for use at the next symbol epoch, forming a classical servo loop.
In practice, noise is always present so that the resultant phase error measurement may be grossly distorted, especially when an incorrect decision is made in converting the phase difference between the incoming phase and the estimated phase to the resultant phase error measurement. As long as the bit error rate (BER) is small, many existing symbol-by-symbol decision directed phase locked loops (DD-PLLs) perform well. However, at low signal-to-noise ratios, the BER can be relatively high which means that the phase detector can also be unreliable. The initial phase error can be as much as +/−30 degrees when phase tracking of the data portion of the burst begins. Although correction algorithms such as Reed-Muller can be used to correct random errors, high initial phase error nevertheless results in high codeword error rates because it is difficult for the phase locked loop to lock and to correct for large phase errors. The effect of large initial phase errors, together with the large amount of noise entering the loop, may cause the demodulator to perform unacceptably when demodulating the beginning of the data portion. Indeed, the presence of large phase errors, either initially or during tracking, typically results in dropped cells. For burst communication systems, such as time division multiplexed access (TDMA), and especially for satellite communication systems with low signal-to-noise ratios, there is a need to reliably demodulate and decode the data portion of each burst and to reduce the number of dropped cells. Eliminating large errors in the initial phase estimates in the demodulator phase tracking loop can reduce the number of dropped cells.
For at least the above reasons, conventional decision directed phase locked loops (DD-PLLs) may fail to adequately track the phase of a phase shift keying (PSK) modulated signal, and to minimize the error rate for recovered data, especially significant errors at the beginning of phase tracking which result in dropped cells. This consequence is particularly damaging for digital communication systems such as satellite communication systems that utilize error correction codes and large constellation signal sets to communicate at very low signal-to-noise ratios.
FIG. 8
graphically illustrates the relationship between the actual phase of a communications waveform and the estimate of the communications waveform in a phase tracking loop of a demodulator over time.
BRIEF SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a communications receiver for use in satellite communication systems which compensates for possibly large errors in the initial phase estimates of a phase tracking loop and reduces the codeword error rate at the beginning of phase tracking due to poor initial phase estimates.
It is further an object of the present invention to provide a communications receiver using a short block of biorthogonal codes (e.g., Reed-Muller codes) within a phase tracking loop (PTL) of a demodulator and to improve the cycle slip and cell loss rate (CLR) when tracking the phase of a phase shift keying modulated signal waveform.
Yet another object of the invention is to run a group of data symbols at the beginning of a communications waveform backwards through the phase tracking loop in a demodulator to correctly demodulate that first group of data symbols.
These and other objects of the present invention may be achieved by a demodulator for demodulating a modulated signal waveform in a data communication system, comprising: a phase tracking loop tracking the phase of said modulated signal waveform and having an inner block decoder configured to decode a set of vector pairs of the modulated signal waveform at a decode rate to generate associated codew

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