Method and apparatus for driving liquid crystal display

Details Method and apparatus for driving liquid crystal display Method and apparatus for driving liquid crystal display

2001-12-17

2004-06-22

Lao, Lun-Yi (Department: 2673)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S092000, C345S204000

Reexamination Certificate

active

06753837

ABSTRACT:

This application claims the benefit of Korean Application No. P2001-54123 filed on Sep. 4, 2001, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display, and more particularly, to a method and apparatus for driving a liquid crystal display. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for improving a picture quality.
2. Discussion of the Related Art
Generally, a liquid crystal display (LCD) controls a light transmittance of each liquid crystal cell in accordance with a video signal to thereby display a picture. An active matrix LCD including a switching device for each liquid crystal cell is suitable for displaying a moving picture. The active matrix LCD uses a thin film transistor (TFT) as a switching device.
The LCD has a disadvantage in that it has a slow response time due to inherent characteristics of a liquid crystal such as a viscosity and an elasticity, etc.
Referring to
FIG. 1
, the conventional LCD cannot express desired color and brightness. Upon implementation of a moving picture, a display brightness BL fails to arrive at a target brightness corresponding to a change of the video data VD from one level to another level due to its slow response time. Accordingly, a motion-blurring phenomenon appears from the moving picture and a display quality is deteriorated in the LCD due to a reduction in a contrast ratio.
In order to overcome such a slow response time of the LCD, U.S. Pat. No. 5,495,265 and PCT International Publication No. WO99/05567 have suggested to modulate data in accordance with a difference in the data using a look-up table (hereinafter, referred to as high-speed driving scheme). This high-speed driving scheme allows data to be modulated by a principle as shown in FIG.
2
.
Referring to
FIG. 2
, a conventional high-speed driving scheme modulates input data VD and applies the modulated data MVD to the liquid crystal cell, thereby obtaining a desired brightness MBL. This high-speed driving scheme modulates input data on the basis of a difference of the data so that a desired brightness can be obtained in response to a brightness value of the input data within one frame interval. Accordingly, the LCD employing such a high-speed driving scheme compensates for a slow response time of the liquid crystal by modulating a data value in order to alleviate a motion-blurring phenomenon from a moving picture, thereby displaying a picture at desired color and brightness.
The high-speed driving scheme compares each most significant bit data MSB of the previous frame Fn−1 and the current frame Fn, and selects the modulated data corresponding from the look-up table to modulated as in
FIG. 3
, if there is any change between the most significant bit data MSB.
In case of limiting the most significant bits to 4 bits, the look-up table of the high-speed driving scheme is implemented as in Table 1 and Table 2.
TABLE 1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
0
2
3
4
5
6
7
9
10
12
13
14
15
15
15
15
1
0
1
3
4
5
6
7
8
10
12
13
14
15
15
15
15
2
0
0
2
4
5
6
7
8
10
12
13
14
15
15
15
15
3
0
0
1
3
5
6
7
8
10
11
13
14
15
15
15
15
4
0
0
1
2
4
6
7
8
9
11
12
13
14
15
15
15
5
0
0
1
2
3
5
7
8
9
11
12
13
14
15
15
15
6
0
0
1
2
3
4
6
8
9
10
12
13
14
15
15
15
7
0
0
1
2
3
4
5
7
9
10
11
13
14
15
15
15
8
0
0
1
2
3
4
5
6
8
10
11
12
13
15
15
15
9
0
0
1
2
3
4
5
6
7
9
11
12
13
14
15
15
10
0
0
1
2
3
4
5
6
7
8
10
12
13
14
15
15
11
0
0
1
2
3
4
5
6
7
8
9
11
12
14
15
15
12
0
0
1
2
3
4
5
6
7
8
9
10
12
14
15
15
13
0
0
1
2
3
3
4
5
6
7
8
10
11
13
15
15
14
0
0
1
2
3
3
4
5
6
7
8
9
11
12
14
15
15
0
0
0
1
2
3
3
4
5
6
7
8
9
11
13
15
TABLE 2
0
16
32
48
64
80
96
112
128
144
160
176
192
208
224
240
0
0
32
48
64
80
96
112
144
160
192
208
224
240
240
240
240
16
0
16
48
64
80
96
112
128
160
192
208
224
240
240
240
240
32
0
0
32
64
80
96
112
128
160
192
208
224
240
240
240
240
48
0
0
16
48
80
96
112
128
160
176
208
224
240
240
240
240
64
0
0
16
48
64
96
112
128
144
176
192
208
224
240
240
240
80
0
0
16
32
48
80
112
128
144
176
192
208
224
240
240
240
96
0
0
16
32
48
64
96
128
144
160
192
208
224
240
240
240
112
0
0
16
32
48
64
80
112
144
160
176
208
224
240
240
240
128
0
0
16
32
48
64
80
96
128
160
176
192
224
240
240
240
144
0
0
16
32
48
64
80
96
112
144
176
192
208
224
240
240
160
0
0
16
32
48
64
80
96
112
128
160
192
208
224
240
240
176
0
0
16
32
48
64
80
96
112
128
144
176
208
224
240
240
192
0
0
16
32
48
64
80
96
112
128
144
160
192
224
240
240
208
0
0
16
32
48
48
64
80
96
112
128
160
176
208
240
240
224
0
0
16
32
48
48
64
80
96
112
128
144
176
192
224
240
240
0
0
0
16
32
48
48
64
80
96
112
128
144
176
208
240
In Table 1 and Table 2, a furthermost left column is for a data voltage VDn−1 of the previous frame Fn−1 while an uppermost row is for a data voltage VDn of the current frame Fn. Table 1 is a look-up table information in which the most significant 4 bits (i.e., 2
0
, 2
1
, 2
2
and 2
3
) are expressed by the decimal number format. Table 2 is a look-up table information in which weighting values (i.e., 2
4
, 2
5
, 2
6
and 2
7
) of the most significant 4 bits are applied to 8-bit data.
Only the most significant bit data MSB are modulated in order to reduce the memory size and the look-up table upon implementation of hardware. In such a manner, the high-speed driving apparatus may be implemented, as shown in FIG.
4
.
Referring to
FIG. 4
, a conventional high-speed driving apparatus includes a frame memory
43
connected to a most significant bit bus line
42
, and a look-up table
44
connected to both the most significant bit bus line
42
and the frame memory
43
.
More specifically, the frame memory
43
stores the most significant bit data MSB during one frame interval and supplies the stored data to the look-up table
44
. Herein, the most significant bit data MSB are high-order 4 or 3 bits in the 8 bit data as described above.
The look-up table
44
compares the most significant bit data of the current frame Fn inputted from the most significant bit bus line
42
and the most significant bit data of the previous frame Fn−1 inputted from the frame memory
43
in Table 1 and Table 2, thereby selecting and outputting modulated data Mdata. The modulated most significant bit data Mdata are added with least significant bit data bypassed through a least significant bit bus line
41
, and is then inputted into a liquid crystal display.
Nevertheless, the above high-speed driving method and apparatus still has a problem. For example, a difference between a modulated 8 bit data value and an actual input value becomes great even though there is almost no difference between gray levels, as shown in FIG.
5
. In this case, actual gray level values which generally do not cause a recognizable difference to the naked eye. Nonetheless, it causes the recognizable difference in brightness to the naked eye. As a result, a picture quality is deteriorated as much.
FIG. 5
illustrates 8 bit modulated data expressed in decimal number. Each of the most significant bit data MSB is added with the least significant bit data LSB of 4 bits.
In
FIG. 5
, a band (X,Y) is the value calculated by adding the least significant bits of 4 bits with the most significant bit data MSB of 4 bits that are modulated, and is defined as a modulated data band divided by each most significant bit data MSB. Herein, X represents the value of the most significant bit data MSB of the previous frame Fn−1 expressed in 8 bit data, while Y represents the value of the least significant bit data LSB of the current frame Fn expressed in 8 bit data. The data shown in the shadow cell, which are the most significant bits in each band (X,Y), represent the modulated data registered at the look-up table of Table 1 and Table 2.
As described in Table 2 and
FIG. 5
, the value of the most significant bit data MSB is added with ‘0’ to ‘15’ corresponding to the value of the least significant bit data LSB of 4 bits, which is added with the most significant bit data MSB modulated at each

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