Semiconductor device manufacturing: process – Direct application of electrical current
Reexamination Certificate
2003-06-30
2004-11-02
Booth, Richard A. (Department: 2812)
Semiconductor device manufacturing: process
Direct application of electrical current
C438S507000
Reexamination Certificate
active
06812117
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to molecular electronics and more specifically to a method for creating a reconfigurable nanometer-scale electronic network for computational and sensing applications. Because of the reduced size of this network, relative to state-of-the-art lithographically-defined integrated circuits, it is anticipated that the functional network will have orders of magnitude improvement in processor speed and power consumption.
Electronic circuits are currently fabricated almost exclusively by a process in which electronic devices and interconnects are defined with photolithography. In this process, a light- or electron-sensitive thin film, typically 0.1-1 &mgr;m thick is deposited on a substrate, and then exposed to a light or electrons in a pattern which defines the boundaries of the device or interconnect. This minimum feature size definable by this process is approximately limited by the wavelength of light or the electron wavefunction, and generally is not less than a few tenths of a micron.
Prior art systems of interest are disclosed in the following three references, the disclosures of which are incorporated herein by reference:
Direct measurement of electrical transport through DNA molecules, Danny Porath, Alexey Bezryadin, Simon de Vries, Cees Dekker (Nature, vol. 403, 10 Feb. 2000)
Chemically synthesized and assembled electronics devices, Inventors: Heath; James R. (Santa Monica, Calif.); Williams; R. Stanley (Mountain View, Calif.); Kuekes; Philip J. (Menlo Park, Calif.) Assignee: Hewlett-Packard Co. (Palo Alto, Calif.) Appl. No.: 282048 Filed: Mar. 29, 1999.
Molecular-wire crossbar interconnect (MWCI) for signal routing and communications, Inventors: Kuekes; Philip J. (Menlo Park, Calif.); Williams; R. Stanley (Mountain View, Calif.); Heath;. James R. (Santa Monica, Calif.) Assignee: Hewlett-Packard Company (Palo Alto, Calif.) Appl. No.: 280225 Filed: Mar. 29, 1999.
The speed and power used by electronic circuits generally scales with the size of the electronic devices and the distance between these devices, such that the smaller circuits are faster and use less power. Because electronic devices have been getting smaller and closer together for the last thirty years, processors based on these devices have been improving in performance. However, this trend cannot continue with the present lithography-defined circuits because of the wavelength limitation on minimum feature size described previously.
It is conceivable that individual molecules could be designed in such a way that they could act as extremely small transistors, resistors, capacitors, or other needed components of a modern electronic processor. Using molecular electronic components, the trend toward smaller processors would reach its ultimate limit in terms of processing power and speed. With existing techniques such as crystallization, molecules can arranged in regular patterns, but perfectly regular arrays of devices are not useful performing calculations or other useful functions since there is no way to ensure that a particular operation occur on a given device at a given time relative to other devices in the array. There is therefore a need for a method which is capable of (1) electrically connecting molecules to one another, and (2) defining the network of connections such that the network can perform useful functions such as computation or sensing.
SUMMARY OF THE INVENTION
The present invention includes a method for creating a reconfigurable nanometer-scale electronic network. One embodiment of the invention is made up of the following steps.
The first step entails depositing nanometer-scale electrically conducting islands on an insulating substrate.
The next step entails engineering electrically conducting molecules to preferentially attach to the nanometer-scale electrically conducting islands, forming a semi-regular array of current-conducting elements.
The next step entails selecting individual nodes for bond breaking by applying electrical currents through two orthogonal molecular filaments; this current heats both the molecules and islands, raising the temperature of the current-conducting elements at individual nodes and breaking bonds in accordance with a pre-selected network design.
The next step entails repeating the step of selecting individual nodes for bond breaking to produce thereby the nanometer-scale electronic network.
This applying step is accomplished using electrical currents through two orthogonal molecular filaments; current will heat both the molecules and islands since energy/time (power), P, will be applied through the current carrying elements according to: P=I
2
R (where I is the current and R the resistance of the element) and this energy will not be perfectly dissipated through radiation or phonon conduction mechanisms; excess energy will be converted to heat, raising the temperature of the current-conducting elements.
Additional forces can be applied to the selected molecules with a magnetic field, B, in the plane of the substrate; these fields will induce out-of-plane forces, F, on only those molecules which are carrying current according to F=Il×B where L is a vector representing the length of the molecule.
REFERENCES:
patent: 6430511 (2002-08-01), Tour et al.
patent: 2002/0176276 (2002-11-01), Zhang et al.
patent: 2003/0153001 (2003-08-01), Soane et al.
patent: 2003/0173595 (2003-09-01), Kuekes
patent: 2004/0039717 (2004-02-01), Nugent
patent: 2004/0041617 (2004-03-01), Snider et al.
patent: 2004/0093575 (2004-05-01), Heath et al.
Auton William G.
Booth Richard A.
The United States of America as represented by the Secretary of
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