Electricity: motive power systems – Induction motor systems – Primary circuit control
Reexamination Certificate
2003-05-21
2004-11-16
Leykin, Rita (Department: 2837)
Electricity: motive power systems
Induction motor systems
Primary circuit control
C318S799000, C318S800000, C318S808000, C318S811000, C318S809000
Reexamination Certificate
active
06819077
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
Not applicable.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not applicable.
BACKGROUND OF THE INVENTION
The field of the invention is pulse width modulated (PWM) controllers and more specifically a method and apparatus for modifying modulating signals as a function of a carrier frequency and/or an electrical operating frequency to minimize sampling related errors in phase shift and magnitude.
One type of commonly designed induction motor is a three phase motor having three Y-connected stator windings. In this type of motor, each stator winding is connected to an AC voltage source by a separate supply line, the source generating currents therein. Often, an adjustable speed drive (ASD) will be positioned between the voltage source and the motor to control motor speed.
Many ASD configurations include a PWM inverter consisting of a plurality of switching devices and a controller for controlling the inverter. Referring to
FIG. 1
, an exemplary inverter
9
has six switches
12
-
17
. The switches
12
-
17
are arranged in series pairs between positive and negative DC buses
48
and
49
, each pair forming one of three inverter legs
39
,
40
, and
41
. Each switch includes a high speed semiconductor switching device in inverse parallel relationship with a diode. For example, diode
23
is associated with switch
12
. Similarly, diodes
25
,
27
,
24
,
26
and
28
are associated with switches
14
,
16
,
13
,
15
and
17
, respectively.
A controller
11
is linked to each switch by a separate control line. For example, controller
11
is linked to switch
12
via line
51
. Similarly, controller
11
is linked to switches
13
,
14
,
15
,
16
and
17
via lines
52
,
53
,
54
,
55
and
56
, respectively. Controller
11
controls the on and off cycles of the switches
12
-
17
via lines
51
-
56
.
Referring still to
FIG. 1
, each leg
39
,
40
and
41
is linked to a separate one of three motor terminals
31
,
30
32
, respectively. Referring specifically to leg
39
, by triggering switches
12
,
13
on and off in a repetitive sequence, terminal
31
and winding
36
linked to leg
39
receives high frequency DC voltage pulses. Similarly, each of legs
40
and
41
are controlled to provide pulses to associated terminals
30
and
32
and hence to windings
35
and
37
.
Referring to
FIG. 2
, an exemplary sequence of high frequency voltage pulses
60
that inverter
9
might provide to terminal
31
can be observed along with an exemplary low frequency alternating fundamental voltage
62
and related alternating current
69
. By varying the widths of positive portions
63
of each high frequency pulse relative to the widths of negative portions
64
over a series of high frequency voltage pulses
60
, a changing average voltage which alternates sinusoidally is generated. The changing average voltage defines the low frequency alternating voltage
62
that drives motor
19
. Low frequency alternating voltage
62
in turn produces low frequency alternating current
69
that lags the voltage by a phase angle &PHgr;. By triggering switches
12
and
13
in a regulated sequence, inverter
9
is used to control both the amplitude and frequency of voltage
62
that eventually reach the stator windings (e.g.,
36
).
Referring to
FIG. 3
a
, representative waveforms used to generate trigger signals for leg
39
are illustrated. As well known in the art, a carrier signal or waveform
67
is perfectly periodic and operates at what is known as a carrier frequency f
c
. A command or modulating voltage waveform
68
is sinusoidal, having a much lower frequency f
e
and a greater period than carrier signal
67
.
Referring also to
FIGS. 3
b
and
3
c
, an upper trigger signal
72
and a lower trigger signal
74
corresponding to a comparison of waveforms
67
and
68
and for controlling the upper and lower switches
12
,
13
, respectively, can be observed. The turn-on t
u1
,t
u2
and turn-off t
o1
, t
o2
trigger times of the upper and lower signals
72
,
74
come from the intersections of command waveform
68
and carrier waveform
67
.
When command waveform
68
intersects carrier waveform
67
while carrier waveform
67
has a positive slope (i.e. during periods T
p
), upper signal
72
goes OFF and lower signal
74
goes ON. When command waveform
68
intersects carrier waveform
67
while carrier waveform
67
has a negative slope (i.e. during periods T
n
), upper signal
72
goes ON and lower signal
74
goes OFF. Thus, by comparing carrier waveform
67
to command waveform
68
, trigger times are determined.
Early control systems operated using only a single carrier signal frequency which, at the time, addressed most application requirements and was suitable given inverter switching limitations. As switching technology has evolved, however, much higher switching speeds have been realized and hence a much greater range of carrier signal frequencies are now available. With control system evolution it has been recognized that carrier signal frequency can have various advantageous and disadvantageous affects on system control and that, therefore, different carrier frequencies are ideal for different applications. For example, harmonic content in a PWM system has been known to generate audible noise in certain applications. The harmonic content in a PWM system can be altered to some degree by altering the carrier frequency and hence audible noise can typically be tuned out of a system via carrier frequency changes.
As another example, increased carrier frequency sometimes results in reflected voltages that have been known to damage system cabling and/or motor windings (see U.S. Pat. No. 5,831,410 titled “Apparatus used with AC motors for eliminating line voltage reflections” which issued on Feb. 12, 1997 for a detailed explanation of reflected waves). As one other example, when carrier frequencies are increased the number of switching cycles are similarly increased and overall switching losses (e.g., switching losses occur during each switching cycle) and system heating are also increased. As yet another example, as carrier frequency is increased ripple current in the resulting waveforms is reduced appreciably. Thus there are tradeoffs that have to be understood and accounted for when selecting carrier frequency for specific system configurations and applications.
There are many systems today that allow carrier frequency to be altered to address application specific requirements. In addition, there are several applications where carrier frequency is altered on the fly as a function of other operating parameters and intended control requirements. For one example of an application where carrier frequency is altered on the fly, see U.S. patent application Ser. No. 09/956,781 titled “Method and Apparatus for Compensating for Device Dynamics by Adjusting Inverter Carrier Frequency ” which was filed on Sep. 20, 2001 and which is commonly owned with the present invention.
Unfortunately, under certain circumstances, on the fly carrier frequency changes have been known to cause system disturbances. To this end,
FIG. 4
illustrates an exemplary q-axis torque producing current I
qe
and a resulting single phase current I
ws
where a carrier frequency f
c
is altered at time &tgr;
1
from 3 KHz to 4 KHz. As illustrated, when the carrier frequency is altered at time &tgr;
1
, a noticeable current disturbance occurs which shows up in single phase current I
ws
most noticeably as a magnitude change. Although less noticeable, a phase change also occurs at time &tgr;
1
.
Disturbances like the one illustrated in
FIG. 4
occur because of the way in which modulating waveforms are generated for comparison to carrier signals. In this regard, an exemplary modulating waveform generator
200
is illustrated in FIG.
5
. The generator
200
receives a command frequency signal &ohgr;
e
in radians/second and two phase synchronous d and q-axis command voltage signals V
qe
and V
de
(e.g., from a synchronous current frame regulator) and uses tho
Kerkman Russel J.
Seibel Brian J.
Leykin Rita
Quarles & Brady LLP
Rockwell Automation Technologies Inc.
Walbrun William R.
LandOfFree
Method and apparatus for reducing sampling related errors in... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for reducing sampling related errors in..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for reducing sampling related errors in... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3342172