Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Reexamination Certificate
2001-06-11
2004-02-03
Lee, Eddie (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
C438S456000, C438S107000
Reexamination Certificate
active
06686642
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to micro-fabrication of methods for bonding substrates to form wide-gap spacing between the portions of the substrate, and in particular, to systems that take advantage of the wide-gap spacing.
BACKGROUND
Many applications use bonded substrates to integrate different functions that are fabricated on separate substrates to take advantage of different technologies or to save space. Such applications include mass storage devices, display devices, and micro-mechanical systems (MEMs). Exemplary MEMs are pressure transducers and accelerometers to name a couple.
In several of the applications that use bonded substrates, a tightly controlled gap or space is required between the bonded substrates for thermal, electrical, or mechanical separation. One conventional solution sets a gap by applying a spacer material on at least one substrate to a desired thickness to provide the gap spacing. Conventional integrated circuit (IC) fabrication techniques to apply the spacer material, such as sputtering of metal films, cannot deposit large thickness required for some applications. Because thicker sputtered metal films suffer from stress and flaking, the amount of the gap spacing using conventional processes is limited to thicknesses less than a few microns.
However, some applications require large gaps between the substrates, for example, such as to provide for high voltage separation or isolation. To ensure long term reliability, preferably the space within the gap of the bonded substrates is evacuated of air and a vacuum maintained in the space over the life of a product. Any defect caused by the stress or flaking of sputtered metal films can result in a leak, thus compromising the vacuum and thereby ultimately causing the product to likely fail.
Alternatively, thick gaps can be conventionally made by electroplating at least one substrate to have a thick spacer material over the entire substrate. The spacer material then is etched to leave only the bonding spacer. However, this etching of the electroplated layer can damage other materials such as thin-film layers that have been previously applied to the substrate. Therefore, electro-plating has not been an effective option.
When bonding the separate substrates together, it is preferable to have interconnections that can carry signals and power between the bonded substrates. By adding spacer material, such as sputtered metal films or electroplated metals, the interconnections are difficult to make as the additional thickness of the spacer material must be compensated for when making the interconnections.
Accordingly, what is required is a new method of bonding various substrates from the same or different technologies that allow for wide-gap spacing and which can preferably provide an air-tight seal and preferably allow for interconnections between the bonded substrates to be easily formed.
SUMMARY
An integrated circuit includes a substrate having an etched surface and a non-etched surface. The etched surface contains circuit elements and the non-etched surface contains a bonding surface. The non-etched surface is located at a predetermined height from the etched surface. Bonding this integrated circuit with another substrate creates a wide-gap between the substrates that is preferably evacuated and hermetically sealed.
REFERENCES:
patent: 4989063 (1991-01-01), Kolesar, Jr.
patent: 5216490 (1993-06-01), Greiff et al.
patent: 5557596 (1996-09-01), Gibson et al.
patent: 5581028 (1996-12-01), Barth et al.
patent: 5903099 (1999-05-01), Johnson et al.
patent: 5919548 (1999-07-01), Barron et al.
patent: 6008576 (1999-12-01), Nakatani et al.
patent: 6062461 (2000-05-01), Sparks et al.
patent: 6118181 (2000-09-01), Merchant et al.
patent: 6137212 (2000-10-01), Liu et al.
patent: 6291908 (2001-09-01), Tran et al.
patent: 6319745 (2001-11-01), Bertin et al.
patent: WO99/28971 (1991-06-01), None
patent: WO01/24259 (2001-04-01), None
Li, Xinxin, et al. “A Novel Fabrication Methodology For Micromachined Sensor-Arrays With Multi-Thickness Configuration.” Microelectromechanical Systems (MEMS), vol. 1, 1999, p. 269-274.
Kutchoukov, V.G., et al. “New Photoresist coating method for 3-D structured wafers.” Elsevier Sensors and Actuators, 85 (2000) pp. 377-383.
Carley, L. Richard, et al. “MEMS-Based Integrated-Circuit Mass-Storage Systems.” Communications of the ACM, Nov. 2000, vol. 41, No. 11, pp. 73-80.
Haluzak Charles C.
Liebeskind John
Regan Michael J.
Gebremariam Samuel A
Hewlett--Packard Development Company, L.P.
Lee Eddie
Myers Timothy F.
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