Data processing: measuring – calibrating – or testing – Testing system
Reexamination Certificate
2001-05-25
2004-06-01
Nghiem, Michael (Department: 2863)
Data processing: measuring, calibrating, or testing
Testing system
Reexamination Certificate
active
06745144
ABSTRACT:
BACKGROUND AND SUMMARY OF THE INVENTION
This application claims the priority of German Application No. 100 26 124.8, filed May 26, 2000, the disclosure of which is expressly incorporated by reference herein.
The invention relates to a circuit arrangement for a motor vehicle that is equipped with a multitude of functional modules, which are connected through at least two bus systems with a joint gateway.
Such a circuit arrangement is known for example from German Patent document DE 196 00 644 A1. This familiar circuit arrangement is equipped with two bus systems and a joint gateway, which consists of two intelligent control devices that have been combined into one central unit. The control devices, however, can also each be functional modules. Each control device of this central unit is allocated a bus system. For the purpose of data exchange among the buses, the control devices are equipped with a defined interface. In this familiar circuit arrangement, emphasis is placed on flexibility. A mechanism for handling errors is not mentioned in the reference.
In the future, different, preferably linear, bus systems are supposed to be cross-linked with each other increasingly in motor vehicles, onto which particularly a logical ring structure is supposed to be superimposed, i.e. the functional modules transmit across the buses in a specified sequence one after the other. The transfer interruption between the bus systems has a particularly unpleasant effect because the entire network is disrupted.
The object of the invention, particularly with regard to planned future bus systems in motor vehicles with communication among the buses, consists of increasing the availability of the motor vehicle functions.
This problem is solved with a circuit arrangement for a motor vehicle that is equipped with a multitude of functional modules, which are connected through at least two bus systems with a joint gateway. The gateway is equipped with a receiving channel (E
A
, E
B
, E
C
) and a transmitting channel (S
A
, S
B
, S
C
), respectively, for each bus system (A, B, C). The gateway contains testing instruments, which monitor the successful transmission of data to a functional module (
2
,
3
,
5
;
1
,
4
,
6
;
7
) of a data bus system (A; B; C) and/or the successful reception of data from a functional module of a data bus system. The gateway is also equipped with blocking instruments, which block the receiving channel if transmission was not successful and/or block the transmitting channel if reception was not successful. Advantageous developments of the invention are further described herein.
The circuit arrangement for a motor vehicle in accordance with the present invention is equipped with a multitude of functional modules, which are divided between at least two bus systems. The bus systems in turn are connected via a joint gateway. The gateway is equipped with a receiving channel and a transmitting channel, respectively, for each bus system. Additionally, the gateway contains testing instruments, which monitor the successful transmission of data to a functional module of a data bus system and/or the successful reception of data from a functional module of a data bus system. The gateway is also equipped with blocking instruments, which block the receiving channel if transmission was not successful and/or block the transmitting channel if reception was not successful.
These receiving and/or transmitting blocking instruments prevent, for example, that ring information of the bus system with the defective transmitting and/or receiving channel appears on the other bus systems. In this way, an interruption of the logical ring can be recognized promptly for all bus systems. The logical ring for all bus systems is therefore purposely abandoned and, while taking the blocked bus system into consideration, a new logical structure is re-formulated so as to pass on ring information among the bus systems only via the non-blocked bus systems. The blocked bus system continues to work on its own, in a decoupled manner. This way, calculation time intensive disruption routines during data transfer are largely avoided.
As an additional note, it should be pointed out that the receiving and transmitting blockage can also occur for other reasons, e.g. from application or diagnostic functions.
In a beneficial embodiment of the invention, the gateway is equipped with repeating instruments with which a repetition of the transmission of data across the transmitting channel that is allocated to the blocked receiving channel and/or with which the reception of data via the receiving channel that is allocated to the blocked transmitting channel is attempted under specific conditions. The gateway opens the blocking instruments when renewed transmission attempts and/or reception attempts are successful.
Such a “revival method” further increases availability because an emergency run in the form of a re-formulation of the bus systems, which can lead to at least minor functional restrictions, is not maintained unnecessarily.
The gateway is preferably an integrated intermediate unit between the bus systems that are connected to the gateway and another functional module. The additional functional module is considered an autonomous bus system in the form of a virtual bus. The gateway and the additional functional module can form a central unit, which has only one CPU.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.
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patent: 6233509 (2001-05-01), Becker
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Bader Richard
Froeschl Joachim
Kaltenbrunner Martin
Bayerische Motoren Werke Aktiengesellschaft
Crowell & Moring LLP
Nghiem Michael
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