1989-01-04
1990-09-25
Fleming, Michael R.
Excavating
371 211, G06F 1100
Patent
active
049598350
ABSTRACT:
A memory management unit is capable of judging that a specific bit has been partially rewritten by checking it against a dummy bit stored in a tag memory which is included in the memory management unit and thus correcting a parity bit. Accordingly, it is possible to accurately execute a parity check operation and it is also possible to improve the throughput of the memory management unit and hence promote lowering in the cost.
REFERENCES:
patent: 4768193 (1988-08-01), Takemae
patent: 4785452 (1988-11-01), Petz
patent: 4809278 (1989-02-01), Kim
patent: 4811347 (1989-03-01), Bolt
Nikkei Electronics, Nikkei McGraw-Hill, pp. 137-152, Dec. 5, 1983.
Shimizu Teruhisa
Yosida Nobuo
Fleming Michael R.
Hitachi , Ltd.
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