Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2002-01-10
2004-11-09
Lamarre, Guy J. (Department: 2133)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S062000, C345S068000
Reexamination Certificate
active
06816133
ABSTRACT:
This application incorporates by reference Taiwanese application Serial No. 90100657, filed Jan. 11, 2001.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a driving method for a plasma display panel (hereinafter referred to as PDP) and a circuit thereof, particularly to a driving method for reducing a voltage difference of the sustaining electrode and circuit thereof.
2. Description of the Related Art
Please refer to
FIG. 1
, it shows a cross-sectional view of a conventional PDP structure. There are several sustaining electrodes X and scanning electrodes Y alternately disposed on the surface of the front glass substrate
102
and are parallel to each other. Each of the sustaining electrode X or scanning electrode Y comprises a transparent electrode
106
and an auxiliary electrode
108
. The auxiliary electrode
108
is used to increase the conductivity of the transparent electrode
106
. A dielectric layer
110
is positioned on the transparent electrode
106
and the auxiliary electrode
108
, and a protective layer
112
covers the dielectric layer
110
.
A plurality of address electrodes
114
, which are perpendicular to the sustaining electrodes X and the scanning electrodes Y, are positioned on the surface of the rear glass substrate
104
. Each address electrode
114
is formed below a fluorescent layer
116
and ribs (not shown in FIG.
1
). The discharge space
118
is formed between the protective layer
112
and the fluorescent layer
116
. The discharge space is filled with discharge gas, for instance, inert gases.
Referring to
FIG. 2
, it is the diagram of the electrode arrangement of the conventional PDP. The sustaining electrode X and the scanning electrode Y are alternately disposed, that is, these electrodes are arranged by the order of scanning electrode Y(
1
), sustaining electrode X(
1
), scanning electrode Y(
2
) and sustaining electrode X(
2
). The address electrodes A(
1
), A(
2
), A(
3
) and A(
4
) are perpendicular to the sustaining electrodes X and the scanning electrodes Y. Each discharge cell E
1
, can be turned on and off, is defined by the sustaining electrode X, scanning electrode Y and address electrode A.
Referring to
FIG. 3
, it is the diagram showing another electrode arrangement of the conventional PDP. The sustaining electrode X and the scanning electrode Y are arranged by the order of YXXY, that is, the electrodes are arranged by the order of the scanning electrode Y(
1
), sustaining electrode X(
1
), sustaining electrode X(
2
) and the scanning electrode Y(
2
). The address electrode A(
1
), A(
2
), A(
3
) and A(
4
) are perpendicular to the sustaining electrodes X and the scanning electrodes Y. Each discharge element E
2
, can be selectively turned on and off, is defined by each sustaining electrode X, scanning electrode Y and address electrode A.
Referring to
FIG. 4
, it is the diagram of the driving waveform for driving the conventional PDP in
FIG. 2
or FIG.
3
. In this driving method, there are three periods in each subfield, including a reset period P
1
, an address period P
2
, and a sustain period P
3
. The following description is the operation of a PDP having n sustaining electrodes X(
1
)~X(n), n scanning electrodes Y(
1
)~Y(n) and m address electrodes A(
1
)~A(m).
To make sure that the data can be addressed correctly in the pixels, in the reset period P
1
, a priming pulse
402
of 340V is applied to the sustaining electrodes X(
1
)~X(n), and an erase pulse
404
with a positive voltage, a reset pulse
406
with a negative voltage and a stabilizing priming pulse
408
are sequentially applied to the scanning electrodes Y(
1
)~Y(n). The wall charges of the discharge cells are reset to a certain energy state by the pulses described above. Those pulses also reduce the ionized charges in the discharge space
118
.
During the address period P
2
, lots of scanning pulses
410
of −180V are inputted to the scanning electrodes Y(
1
)~Y(n). A voltage V
1
, about 60V, is applied to the sustaining electrodes X(
1
)~X(n). According to the image data to be displayed, the address pulse
412
of 60V is selectively inputted to the address electrodes A(
1
)~A(m) for producing wall charges. Therefore, the wall charges can be increased in the selected discharge cells, and are used as the initial charges for a subsequent sustain period P
3
.
During the sustain period P
3
, the discharge cells emit UV light and the user will see visible light as UV photons hit the fluorescent layer
116
. By the memory effect of the wall charges, the discharge cells are lighted after applying an alternating current with opposite polarities to the scanning electrodes Y(
1
)~Y(n) and the sustain electrodes X(
1
)~X(n). The signals applied to the scanning electrodes Y(
1
)~Y(n) and the sustain electrodes X(
1
)~X(n), are in a range between 180V and 0V, and these signals include a plurality of discharge sustaining pulse
414
.
Please refer to
FIG. 5
which is a block diagram of the circuit and used to drive the conventional PDP in
FIG. 2
or FIG.
3
. Take n=8 as an example. The Y driving circuit
502
includes a reset/scan circuit
504
and a Y sustaining circuit
506
. The reset/scan circuit
504
should provide at lease one signal with a positive voltage and one signal with a negative voltage, so the reset/scan circuit
504
is a positive
egative polarity circuit. During the reset period P
1
or the address period P
2
, the reset/scan circuit
504
provides signals with voltages of 180V, −90V or −180V to the scanning electrodes Y. During the sustain period P
3
, the sustaining circuit
506
provides signals with voltages of 180V or 0V to the scanning electrodes Y. During the address period P
2
and the sustain period P
3
, the Y driving circuit
502
provides the signals to the multiplexer
508
and the scanning IC
510
which is electrically connected to all of the scanning electrodes Y(
1
)~Y(
8
). The scanning IC
510
sequentially outputs the scanning pulse
410
to the scanning electrodes Y(
1
)~Y(
8
) during the address period P
2
, and simultaneously provides discharge sustaining pulses
414
to the scanning electrode Y(
1
)~Y(
8
) during the sustain period P
3
. Moreover, all of the sustaining electrodes X are coupled to the X driving circuit
514
. The X driving circuit
514
includes a reset circuit
516
and a X sustaining circuit
512
. The reset circuit
516
only provides signals with a positive voltage, so the reset circuit
516
is a positive polarity circuit.
Referring to
FIG. 6
, it shows the current IX of the sustaining electrode X, and the voltage of the sustaining electrode X and the scanning electrode Y during the sustain period P
3
in FIG.
4
. After the discharge sustaining pulse
414
is applied, the discharge cell is discharged, and a current Ids will pass through the sustaining electrode X, scanning electrode Y, X sustaining circuit
512
and Y sustaining circuit
506
. The X sustaining circuit
512
and the Y sustaining circuit
506
include a lot of transistors, every transistor has its resistance, and the total resistance of these transistors is defined as Rds. When the current Ids is formed, a voltage difference V=Ids*Rds is occurred within a very short time because of the resistances Rds of these transistors. When the electric current flows out of one electrode, the voltage difference V is negative, and a notch may appear in the voltage waveform of the electrode. When the electric current flows in the electrode, the voltage difference V is positive, and a peak may appear in the voltage waveform of the electrode. In addition, whether a notch or a peak is formed may depend on the signals applied on these electrodes. When the sustaining electrode X is in a positive voltage (e.g. 180V) and the scanning electrode is in a relative negative voltage (e.g. 0V), the instant voltage difference V cause a voltage notch
602
a
in the voltage waveforms of the sustaining electrode X and a peak
602
b
in the voltage waveforms of the scanning electrode Y. The voltage differe
Alphonse Fritz
Au Optronics Corp.
Lamarre Guy J.
Rabin & Berdo P.C.
LandOfFree
Driving method of plasma display panel and circuit thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Driving method of plasma display panel and circuit thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Driving method of plasma display panel and circuit thereof will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3334208