Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2001-06-14
2004-12-07
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C438S166000
Reexamination Certificate
active
06828587
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device in which an active region is formed by a semiconductor film having a crystalline structure. In particular, the present invention relates to a semiconductor device in which a thin film transistor is formed, or in which a circuit is formed by thin film transistors. Note that, in this specification, the term semiconductor device indicates general devices which can function by utilizing semiconductor characteristics, and that semiconductor integrated circuits, electro-optical devices, and electronic devices are all included in the category of semiconductor devices.
Note also that, throughout this specification, the term semiconductor device indicates general devices which can function by utilizing semiconductor characteristics, and electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices.
2. Description of the Related Art
Techniques of using a semiconductor film (hereinafter referred to as crystalline semiconductor film) having a crystalline structure on the order of several nm to several hundreds of run in thickness formed on a substrate having an insulating surface in order to form thin film transistors (hereafter referred to as TFTs) have been developed. TFTs are being put into practical use as switching elements for liquid crystal display devices, and in recent years it has become possible to form a semiconductor integrated circuit on a glass substrate.
Silicon is mainly used as the material for crystalline semiconductor films used in TFTs. A silicon film having a crystalline structure (hereafter referred to as a crystalline silicon film) utilizes an amorphous silicon film deposited on a substrate, such as glass or quartz, by plasma CVD or low pressure CVD, which is then crystallized by heat treatment or laser light irradiation (hereafter referred to as laser processing throughout this specification).
However, it is necessary to heat the amorphous silicon film to a temperature equal to or greater than 600° C. for 10 or more hours in order to crystallize the amorphous semiconductor film if crystallization is performed by heat treatment. The processing temperature and processing time cannot necessarily be thought of as suitable when considering the productivity of TFTs. It also becomes necessary to use a large size heat treatment furnace in order to handle substrates which have large surface areas when considering a liquid crystal display device as an applied product using the TFTs, and not only does the energy consumed during the process of manufacturing increase greatly, but it also becomes difficult to obtain uniform crystals across a wide surface area. Further, if laser processing is used, it is also difficult to obtain homogeneous crystals if laser processing is used because the output of laser oscillators is unstable. This type of dispersion in the quality of crystals becomes a cause of dispersion in the properties of the TFTs, and there is a fear that this will be a factor in lowering the display quality of a liquid crystal display device or an EL display device.
On the other hand, techniques have been developed for manufacturing a crystalline semiconductor film by introducing a metal element for promoting the crystallization of silicon into an amorphous silicon film, and then using heat treatment at a temperature lower than that conventionally used. For example, Japanese Patent Application Laid-open Nos. Hei 7-130652 and Hei 8-78329 disclose that a metal element such as nickel is introduced into an amorphous silicon film, and a crystalline silicon film is obtained by heat treatment for 4 hours at 550° C.
Furthermore, TFTs using crystalline silicon films thus manufactured are still inferior compared to the characteristics of MOS transistors using a single crystal silicon substrate. Even if semiconductor films, having thickness of several nm to several hundreds of nm and formed on various materials such as glass and quartz, are crystallized, only polycrystalline structures made from an aggregate of a plurality of crystal grains can be obtained. Carriers become trapped due to a plurality of defects existing in the crystal grains and in the crystal grain boundaries, and this causes restrictions in the TFT performance.
However, the crystal orientation planes exist randomly for crystalline silicon films manufactured by the above conventional method, and the orientation ratio with respect to a specified crystal orientation is low. Crystalline silicon films obtained by heat treatment or laser processing have a plurality of crystal grains deposited, with a tendency to be oriented in the {111} plane. However, the ratio of this orientation toward the plane orientation does not exceed 20% of the total.
If the orientation ratio is low, then it may be assumed that it becomes almost impossible to maintain continuity of the lattice at crystal grain boundaries in which crystals having differing orientations meet to generate a plurality of unpaired bonding sites. Unpaired bonding sites occurring at the grain boundaries become centers, which capture carriers (electrons, holes), thereby lowering the transport characteristics. Namely, the carrier is dispersed and trapped, and therefore a TFT having high electric field effect mobility cannot be expected when the TFT is manufactured from this type of crystalline semiconductor film. Further, the crystal grain boundaries exist randomly, and therefore it is impossible to form a channel-forming region by crystal grains possessing a specified crystal orientation. This becomes a cause of dispersion in the TFT electrical properties.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a means of solving these types of problems, and an object of the present invention is to increase the orientation of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film, and to provide a TFT, which uses this type of crystalline semiconductor film in an active layer.
The distribution of crystal orientation is found in accordance with EBSP (electron backscatter diffraction patterning). EBSP is a method (hereafter referred to as EBSP method, for convenience) of analyzing crystal orientation from the backscatter of primary electrons using a specialized detector formed in a scanning electron microscope (SEM). In this specification, S-4300SE scanning electron microscope of Hitachi Science Systems Co. Ltd. is used as the scanning electron microscope, and “Orientation Imaging Microscopy” of TSL Co. Ltd. is used as the specialized detector. A method of measuring by the EBSP method is explained in accordance with FIG.
6
. An electron gun (a Schottky field emission electron gun)
101
, a mirror
102
, and a test piece chamber
103
have the same structure as those of a normal scanning electron microscope. A stage
104
is formed having an inclination on the order of 60° for measuring EBSP, and a sample
109
is set thereupon. A screen
105
of a detector
106
is inserted in this state so as to face the test piece.
If an electron beam is irradiated to a test piece having a crystalline structure, inelastic scattering occurs in back, and a linear pattern unique to the crystal orientation within the test sample by Bragg diffraction (generally referred to as a Kikuchi image) is observed. The crystal orientation of the test sample is found by analyzing the Kikuchi images shown in the detector screen with the EBSP method.
FIG. 7
shows a crystalline semiconductor film
122
, having a polycrystalline structure, formed on a substrate
121
. The polycrystalline structure is assumed to possess crystal grains each having different crystal orientations. By repeatedly moving the position at which the electron beam strikes the test piece and analyzing the orientation (mapping measurement), the crystal orientation, or arrangement information, of the planer shape test piece can be obtained. The thickness of the imparted electron beam differs depending upon the type of the e
Asami Taketomi
Kasahara Kenji
Kokubo Chiho
Mitsuki Toru
Shichi Takeshi
Robinson Eric J.
Robinson Intellectual Property Law Office P.C.
Semiconductor Energy Laboratory Co,. Ltd.
Vu David
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