Method and circuit for limiting a pumped voltage

Details Method and circuit for limiting a pumped voltage Method and circuit for limiting a pumped voltage

2002-10-08

2004-06-15

Vu, Bao Q. (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S288000, C323S284000

Reexamination Certificate

active

06750639

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to voltage generation circuits, and, more particularly, to controlling the voltage developed by a voltage generation circuit.
BACKGROUND OF THE INVENTION
Voltage generation circuits are utilized in many integrated circuits to generate voltages required for proper operation of the integrated circuit. For example, in a semiconductor memory device such as a dynamic random access memory (DRAM) a supply voltage VCC is applied to the device and a voltage generation circuit within the memory device generates a pumped voltage VCCP having a value greater than the supply voltage. In a DRAM, the pumped voltage VCCP is utilized, for example, in driving word lines of a memory-cell array when accessing rows of memory cells contained in the array, as will be appreciated by those skilled in the art. The value of the pumped voltage VCCP is greater than the supply voltage VCC so that capacitors in the memory cells may be charged to the supply voltage, as will once again be understood by those skilled in the art.
FIG. 1
is a functional block diagram and schematic illustrating a conventional voltage generation circuit
100
that may be utilized in a DRAM to generate a pumped voltage VCCP having a value greater than an applied supply voltage VCC. The voltage generation circuit
100
includes an oscillator
102
that generates an oscillator signal OSC in response to an enable signal EN applied by a Schmitt Trigger comparator
104
. The oscillator
102
clocks the OSC signal when the EN signal is active and does not clock the OSC signal when the EN signal is inactive, instead maintaining the OSC signal either high or low. The OSC signal is applied to clock a charge pump circuit
106
which, in response to the OSC signal, generates the pumped voltage VCCP. More specifically, when the OSC signal clocks the charge pump circuit
106
, the circuit turns ON and charges a load capacitor
108
to thereby develop the pumped voltage VCCP and drive a load resistance
109
. When the OSC signal does not clock the charge pump circuit
106
, the circuit turns OFF and stops charging the load capacitor
108
. The detailed operation and circuitry for forming the oscillator
102
and charge pump circuit
106
are well understood by those skilled in the art, and thus, for the sake of brevity, these components will not be described in further detail.
The pumped voltage VCCP is applied through a diode-coupled PMOS transistor
110
and a level shifting circuit
112
to develop a pump feedback voltage VPF that is applied to a first input of the Schmitt Trigger comparator
104
. The diode-coupled transistor
110
functions as a level shifter to reduce the value of the pumped voltage VCCP and ensure proper common-mode operation of the Schmitt Trigger comparator
104
, as will be appreciated by those skilled in the art. The level shifting circuit
112
reduces the voltage from the diode-coupled transistor
110
by an offset voltage VOFF, which has a value determined, in part, by the desired value of the pump feedback voltage VPF. A current source
114
causes a desired current to flow through the diode-coupled transistor
110
and level shifting circuit
112
so that the feedback voltage VPF having the desired value is developed on the first input of the Schmitt Trigger comparator
104
. A second input of the Schmitt Trigger comparator
104
receives a reference voltage VREF that is developed by a diode-coupled PMOS transistor
116
and a current source
118
coupled in series between the supply voltage VCC and ground. The diode-coupled transistor
116
functions as a level shifter to reduce the value of the supply voltage VCC and provide for proper common mode operation of the Schmitt Trigger comparator
104
, as will be appreciated by those skilled in the art. The current source
118
causes a desired current to flow through the diode-coupled transistor
116
to develop the reference voltage VREF on the second input of the Schmitt Trigger comparator
104
.
The voltage generation circuit
100
further includes over voltage protection components that attempt to limit the value of the pumped voltage VCCP as the supply voltage VCC increases. The overvoltage protection components include an overvoltage detector
120
that monitors the supply voltage VCC and develops an overvoltage signal OV having a value that is a function of the monitored supply voltage. The overvoltage signal OV is applied to an NMOS transistor
122
that is connected in series with a current source
124
and coupled between the second input of the Schmitt Trigger comparator
104
and ground. When the overvoltage signal OV has a sufficient magnitude, the transistor
122
turns ON causing current to flow through the transistor and current source
124
to ground. The transistor
122
and current source
124
together form a current limiting circuit
126
that operates during an overvoltage mode of the circuit
100
, as will be described in more detail below. The overvoltage signal OV is further applied to a voltage clamping circuit
128
formed by an NMOS transistor
130
and diode-coupled transistor
132
coupled between the output of the charge pump
106
and the supply voltage VCC. When the overvoltage signal OV as a sufficient magnitude, the transistor
130
turns ON allowing current to flow through the diode-coupled transistor
132
and transistor to the supply voltage VCC to thereby clamp the pumped voltage VCCP.
During normal operation of the voltage generation circuit
100
, the supply voltage VCC has a predetermined value and the overvoltage detector
120
drives the overvoltage signal OV sufficiently low to turn OFF the transistors
122
and
130
. Thus, during normal operation the current limiting circuit
126
and clamping circuit
128
do not affect operation of the voltage generation circuit
100
. In operation, the oscillator
102
applies the OSC signal to clock the charge pump
106
which, in turn, develops the pumped voltage VCCP. The pumped voltage VCCP is fed back through the diode-coupled transistor
110
and level shifting circuit
112
to develop the pump feedback voltage VPF. At this point, the current flowing through the diode-coupled transistor
116
as determined by the current source
118
develops the reference voltage VREF. As long as the pump feedback voltage VPF is less than the reference voltage VREF, the comparator drives the EN signal active, causing the oscillator
102
to clock the charge pump
106
.
As the charge pump
106
operates, the pumped voltage VCCP increases to a point where the pumped voltage fed back through the diode-coupled transistor
110
and level shifting circuit
112
causes the pump feedback voltage VPF to exceed the reference voltage VREF. When the pump feedback voltage VPF is greater than the reference voltage VREF, the Schmitt Trigger comparator
104
deactivates the EN signal causing the oscillator
102
to stop clocking the charge pump
106
which, in turn, turns OFF. The charge pump
106
remains OFF until the pumped voltage VCCP discharges through a load resistance
109
and drops to a value causing the pump feedback voltage VPF to once again become less than the reference voltage VREF. When this occurs, the Schmitt Trigger comparator
104
once again activates the EN signal causing the oscillator
102
to clock the charge pump
106
, which turns ON to once again begin charging the pumped output voltage VCCP.
When the supply voltage VCC increases, the overvoltage detector
120
, current limiting circuit
126
, and clamping circuit
128
operate in combination to limit the value of the pumped voltage VCCP. As the supply voltage VCC increases, the reference voltage VREF likewise increases, meaning that the pumped voltage VCCP similarly increases to thereby increase the feedback voltage VPF until it equals the increased reference voltage. When the supply voltage VCC exceeds a predetermined value, the overvoltage detector
120
activates the overvoltage signal OV, turning ON the transistors
122
and
130
. When the transistor
130
turns ON, th

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