Power module

Details Power module Power module

2002-01-07

2004-02-03

Sherry, Michael (Department: 2838)

Electricity: electrical systems and devices

Safety and protection of systems and devices

With specific current responsive fault sensor

C361S086000, C361S094000

Reexamination Certificate

active

06687106

ABSTRACT:

TECHNICAL FIELD
This invention relates to a power module (as will be called the “intelligent power module”) which includes a self arc-extinguishing type semiconductor such as an insulated gate type bipolar transistor (as will be called the “IGBT”: Insulated Gate Bipolar Transistor) and which has a protecting function of the semiconductor.
BACKGROUND OF THE INVENTION
The IGBT is determined in the magnitude of its permissible collector current by the magnitude of a gate voltage so that the collector current becomes the higher for the higher gate voltage. Moreover, the collector-emitter voltage of the IGBT rises the higher as the collector current becomes the higher.
In the collector-gate and the gate-emitter of the IGBT, as shown in
FIG. 6
, there exist parasitic capacitors Ccg and Cge. Therefore, the relation between a collector-emitter voltage VCE and a gate electrode VGE is expressed by:
VGE=&Dgr;VCE×Ccg
/(
Ccg+Cge
).
Here,
Ccg<<Cge,
 
VGE=&Dgr;VCE×Ccg/Cge.
In short, as the collector current increases, the collector-emitter voltage VCE increases so that the gate voltage VGE increases to increase the collector current and to accelerate the increase in the collector current. When an overcurrent flows through the IGBT, therefore, the collector current is abruptly increased by the aforementioned phenomenon to cause a problem that the IGBT has its turn-OFF allowable current exceeded.
Therefore, a method of preventing the gate voltage from increasing is exemplified by the prior art, as disclosed in Japanese Patent Laid-Open No. 262822/1990.
FIG. 7
is a circuit diagram of an essential portion showing the prior art example.
In FIG.
7
: reference numeral
27
designates an IGBT; numeral
21
a DC power source for applying a positive voltage to the gate when the IGBT
27
is turned ON; numeral
22
a DC power source for applying a negative voltage to the gate when the IGBT
27
is turned OFF; numeral
23
a transistor for applying a positive voltage to the gate of the IGBT
27
when turned ON; numeral
24
a transistor for applying a negative voltage to the gate of the IGBT
27
when turned ON; numeral
25
a gate-ON resistor for determining the gate voltage rising rate when the IGBT
27
is turned ON; numeral
26
a gate-OFF resistor for determining the gate voltage dropping rate when the IGBT
27
is turned OFF; numeral
28
a gate-emitter voltage limiting circuit of the IGBT
27
; numeral
28
A a transistor; numeral
28
B a capacitor charged in advance with a voltage equal to that of the DC power source
21
; numeral
28
C a resistor; and numeral
28
D a comparator.
When an “H” is inputted as a gate signal S
1
, as shown in
FIG. 7
, the transistor
23
is turned ON to apply a positive voltage to the gate of the IGBT
27
through the DC power source
21
→the transistor
23
→the gate-ON resistor
25
. As a result, the IGBT
27
is turned ON. At this time, the turn-ON rate of the IGBT
27
is determined by a time constant of the gate-ON resistor
25
and the parasitic capacitor Cge of the IGBT
27
.
When an “L” is inputted as the gate signal S
1
, on the other hand, the transistor
24
is turned ON so that a negative voltage is applied to the gate of the IGBT
27
via a route of the DC power source
22
→the emitter of the IGBT
27
→the gate of the IGBT
27
→the gate-OFF resistor
26
→the transistor
24
. As a result, the IGBT
27
is turned OFF. At this time, the turn-OFF rate of the IGBT
27
is determined by a time constant of the gate-OFF resistor
26
and the parasitic capacitor Cge of the IGBT
27
.
Here, the capacitor
28
B is a capacitor having a sufficiently larger capacitance than that of the gate-emitter capacitor Cge of the IGBT
27
. Moreover, the capacitor
28
B is always charged with a voltage equal to that of the DC power source
21
by the leakage current through the emitter-collector of the transistor
28
A.
For example, the collector current of the IGBT
27
becomes excessive so that this increase in the collector current leads to an increase in the collector-emitter voltage VCE and accordingly in the gate voltage VGE, as has been described hereinbefore. In this case, the voltage of the DC power source
21
and the gate voltage VGE are compared by the comparator
28
D. When the gate voltage VGE exceeds the voltage of the DC power source
21
, the output of the comparator
28
D is set to the “L” level to turn ON the transistor
28
A. At this time, the capacitor
28
B is charged with the voltage of the DC power source
21
so that the gate voltage VGE is kept at the voltage of the DC power source
21
. As a result, the gate voltage VGE does not exceed the voltage of the DC power source
21
so that the collector current is suppressed to such a current value as can be fed by the gate voltage determined by the DC power source
21
.
Where the IGBT is applied to an inverter or the like, on the other hand, it is an important item to suppress the generation loss lowly. It is, therefore, necessary to drop the collector-emitter saturation voltage VCE (sat) of the IGBT. However, the collector-emitter saturation voltage VCE (sat) and the collector saturation current of the IGBT have the trade-off relation, as shown in FIG.
8
. If the collector-emitter saturation voltage VCE (sat) is set low for the same gate voltage, therefore, there are increased the collector current (i.e., the collector saturation current) to be fed. Where the collector-emitter saturation voltage VCE (sat) is thus set low, the short-circuit resistance of the IGBT may be exceeded. In order to keep the short-circuit resistance, therefore, it is seriously difficult to drop the collector-emitter saturation voltage VCE (sat) to a predetermined or lower level.
In the prior art example thus far described, therefore, it is necessary for protecting the IGBT from the short-circuit current to set the collector-emitter saturation voltage VCE (sat) at the predetermined or higher level. This necessity makes it difficult to create an IGBT having a small loss and a large short-circuit resistance and accordingly to reduce the loss of the inverter device.
As the technique for protecting the IGBT against the short-circuit current, on the other hand, there is the prior art, as shown in
FIG. 9
, which is disclosed in Japanese Patent Laid-Open No. 79758/1992 or 139578/1996. In this prior art, there is adopted a method, by which the gate voltage is dropped, when a short-circuit current is detected, through a resistor Rg connected in series with a gate. In this prior art, after a gate voltage Vg is lowered, the gate-emitter voltage of the IGBT drops for the time period which is determined by the time constant of the gate-emitter capacitor Cge and the gate resistor Rg of the IGBT. As illustrated in
FIG. 10
, there is caused a delay Td
1
till the gate voltage begins to drop and till the collector voltage begins to rise after the short-circuit current was detected. At this time, the short-circuit current continues to rise but then begins to drop with a delay Td
2
after the collector voltage rose. Therefore, the short-circuit current does not drop before a delay of Td
1
+Td
2
has passed after the short-circuit current was detected. Therefore, the short-circuit current has risen to such an extremely high value as may exceed the short-circuit resistance of the IGBT. Hence, there is a danger that the IGBT is broken.
This invention has been conceived to solve the aforementioned problems and has an object to provide a power module which is enabled to protect a self arc-extinguishing type semiconductor against a short-circuit current to flow through the collector-emitter of the semiconductor, even if the semiconductor is set with a low collector-emitter saturation voltage VCE (sat), by suppressing the peak value of the short-circuit current.
DISCLOSURE OF THE INVENTION
According to this invention, there is provided a power module comprising: a self arc-extinguishing type semiconductor having a current detecting emitter; and a short-circuit current suppres

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