Electronic assembly comprising ceramic/organic hybrid...

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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C174S254000

Reexamination Certificate

active

06775150

ABSTRACT:

TECHNICAL FIELD
The present subject matter relates generally to electronics packaging. More particularly, the present subject matter relates to an electronic assembly that includes a ceramic/organic hybrid substrate having one or move embedded capacitors to reduce switching noise in a high speed intergrated circuit, and to manufacture methods related thereto.
BACKGROUND INFORMATION
Integrated circuits (ICs) are typically assembled into packages by physically and electrically coupling them to a substrate made of organic or ceramic material. One or more IC packages can be physically and electrically coupled to a printed circuit board (PCB) to form an “electronic assembly”. The “electronic assembly” can be part of an “electronic system”. An “electronic system” is broadly defined herein as any product comprising an “electronic assembly”. Examples of electronic systems include computers (e.g., desktop, laptop, hand-held, server, etc.), wireless communications devices (e.g., cellular phones, cordless phones, pagers, etc.), computer-related peripherals (e.g., printers, scanners, monitors, etc.), entertainment devices (e.g., televisions, radios, stereos, tape and compact disc players, video cassette recorders, MP3 (Motion Picture Experts Group, Audio Layer 3) players, etc.), and the like.
In the field of electronic systems there is an incessant competitive pressure among manufacturers to drive the performance of their equipment up while driving down production costs. This is particularly true regarding the packaging of ICs on substrates, where each new generation of packaging must provide increased performance while generally being smaller or more compact in size.
An IC substrate may comprise a number of insulated metal layers selectively patterned to provide metal interconnect lines (referred to herein as “traces”), and one or more electronic components mounted on one or more surfaces of the substrate. The electronic component or components are functionally connected to other elements of an electronic system through a hierarchy of conductive paths that includes the substrate traces. The substrate traces typically carry signals that are transmitted between the electronic components, such as ICs, of the system. Some ICs have a relatively large number of input/output (I/O) terminals, as well as a large number of power and ground terminals. The large number of I/O, power, and ground terminals requires that the substrate contain a relatively large number of traces. Some substrates require multiple layers of traces to accommodate all of the system interconnections.
Traces located within different layers can be connected electrically by vias formed in the substrate, which vias are referred to as “through-vias” if they go through substantially the entire substrate, or “blind vias” it they connect traces on only two or three layers. A via can be made by making a hole through some or all layers of a substrate and then plating the interior hole surface or filling the hole with an electrically conductive material, such as copper or tungsten.
One of the conventional methods for mounting an IC on a substrate is called “controlled collapse chip connect” (C4). In fabricating a C4 package, the electrically conductive terminations or lands (generally referred to as “electrical contacts”) of an IC component are soldered directly to corresponding lands on the surface of the substrate using reflowable solder bumps or balls. The C4 process is widely used because of its robustness and simplicity.
As the internal circuitry of ICs, such as processors, operates at higher and higher clock frequencies, and as ICs operate at higher and higher power levels, switching noise can increase to unacceptable levels.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a significant need in the art for a method and apparatus for packaging an IC on a substrate that minimize problems, such as switching noise, associated with high clock frequencies and high power delivery.


REFERENCES:
patent: 4567542 (1986-01-01), Shimada et al.
patent: 4926241 (1990-05-01), Carey
patent: 5027253 (1991-06-01), Lauffer et al.
patent: 5060116 (1991-10-01), Grobman et al.
patent: 5177594 (1993-01-01), Chance et al.
patent: 5177670 (1993-01-01), Shinohara et al.
patent: 5281151 (1994-01-01), Arima et al.
patent: 5321583 (1994-06-01), McMahon
patent: 5354955 (1994-10-01), Gregor et al.
patent: 5377139 (1994-12-01), Lage et al.
patent: 5469324 (1995-11-01), Henderson et al.
patent: 5488542 (1996-01-01), Ito
patent: 5639989 (1997-06-01), Higgins, III
patent: 5691568 (1997-11-01), Chou et al.
patent: 5714801 (1998-02-01), Yano et al.
patent: 5736448 (1998-04-01), Saia et al.
patent: 5745335 (1998-04-01), Watt
patent: 5777345 (1998-07-01), Loder et al.
patent: 5786630 (1998-07-01), Bhansali et al.
patent: 5796587 (1998-08-01), Lauffer et al.
patent: 5818699 (1998-10-01), Fukuoka
patent: 5840382 (1998-11-01), Nishide et al.
patent: 5870274 (1999-02-01), Lucas
patent: 5870289 (1999-02-01), Tokuda et al.
patent: 5889652 (1999-03-01), Turturro
patent: 5920120 (1999-07-01), Webb et al.
patent: 5929510 (1999-07-01), Geller et al.
patent: 5939782 (1999-08-01), Malladi
patent: 5949654 (1999-09-01), Fukuoka
patent: 5991161 (1999-11-01), Samaras et al.
patent: 6061228 (2000-05-01), Palmer et al.
patent: 6072690 (2000-06-01), Farooq et al.
patent: 6075427 (2000-06-01), Tai et al.
patent: 6088915 (2000-07-01), Turturro
patent: 6097609 (2000-08-01), Kabadi
patent: 6097611 (2000-08-01), Samaras et al.
patent: 6104599 (2000-08-01), Ahiko et al.
patent: 6183669 (2001-02-01), Kubota et al.
patent: 6218729 (2001-04-01), Zavrel, Jr. et al.
patent: 6252761 (2001-06-01), Branchevsky
patent: 6452776 (2002-09-01), Chakravorty
patent: 6532143 (2003-03-01), Figueroa et al.
patent: 0359513 (1990-03-01), None
patent: 0656658 (1995-06-01), None
patent: 07-142867 (1995-06-01), None
patent: 08-172274 (1996-07-01), None
patent: 10-163447 (1998-06-01), None
patent: WO 97/50123 (1997-12-01), None
patent: WO 98/39784 (1998-09-01), None
patent: WO 00/21133 (2000-04-01), None
patent: WO-01/00573 (2001-01-01), None
Amey, D., et al., “Advances in MCM Ceramics”,Solid State Technology, 143-146, (1997).
Baniecki, J., et al., “Dielectric Relaxation of Ba0.7 Sr0.3 TiO3 Thin Films from 1 mHz to 20 GHz”,Appl. Phys. Letter 72(4), 1998 American Institute of Physics, 198-500, (Jan. 1998).
Chan, Y., et al., “Fabrication and Characterization of Multilayer Capacitors Buried in a Low Temperature Co-Fired Ceramic Substrate”,Active and Passive Elec. Comp. vol. 20, 215-224, (1998).
Choi, K.L., et al., “Characterization of Embedded Passives Using Macromodels in LTCC Technology”,IEEE Transactions on Components, Packaging, and Manufacturing Technology, vol. 21, 258-268, (Aug. 1998).
Eurskens, W., et al., “Design and Performance of UHF Band Inductors, Capacitors and Resonators Using LTCC Technology for Mobile Communication Systems”,1998 IEEE MTT-S Digest, 1285-1288, (1998).
Koschmieder, T., et al., “Ceramic Substrate Thickness, Test Board Thickness, and Part Spacing: A Screening Doe”,Proceedings of SMTA International Conference, 6 pgs., (Sep. 1999).
Mistler, R.E., “Tape Casting: Past, Present, Potential”,The American Ceramic Society Bulletin, 82-86, (Oct. 1998).
Nishimura, T., et al., “3.5 V Operation Driver-Amplifier MMIC Utilizing SrTiO3 Capacitors for 1.95 GHz Wide-Band CDMA Cellular Phones”,1998 IEEE MTT-S Digest, 447-450, (1998).
Rector, Jr., J., et al., “Integrated and Integral Passive Components: A Technology Roadmap”,1997 Electronic Components and Technology Conference, 713-723, (1997).
Scrantom, S., et al., “Manufacture of Embedded Integrated Passive Components into Low Temperature Co-Fired Ceramic Systems”,1998 International Symposium on Microelectronics, 459-466, (1998).
Sugai, K., et al., “Multilayer Alumina Substrates for ECU”,1998 IEEE/CPMT Berlin Int'l Electronics Manufacturing Technology Symposium, 109-112, (1998).
Tok, A.I., et al., “Tape Casting of C

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