Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2001-11-27
2004-12-21
Cuneo, Kamand (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S258000, C361S795000
Reexamination Certificate
active
06833511
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multilayer circuit board, and particularly a molded interconnect device (MID) having a multilayer circuit of a reduced thickness, in which a layer-to-layer connection(s) is formed with high reliability, and a method of manufacturing the same.
2. Disclosure of the Prior Art
In recent years, a molded interconnect device (MID) obtained by three-dimensionally forming circuit patterns on an injection-molded substrate receives attention from the viewpoint of reductions in weight and size of electronic devices, and for the purpose of improving a degree of flexibility in circuit design and achieving high-density wiring.
For example, Japanese Patent Early Publication No. 7-170077 discloses a method of manufacturing injection-molded circuit parts. In this method, as shown in
FIG. 19A
, a plurality of injection-molded circuit members (
1
P,
2
P) are previously produced. Each of the circuit members has conductive circuit patterns (
5
P,
6
P) on its top and bottom surfaces. In addition, each of the circuit members has a positioning hole
10
P, spacing projections
11
P and recesses
12
P for receiving the spacing projections. These circuit members are laminated such that the spacing projection
11
P of the circuit member
1
P is inserted into the corresponding recess
12
P of the adjacent circuit member
2
P, to obtain a multilayer circuit structure. Positions of the respective circuit members in the multilayer circuit structure are determined by allowing a positioning pin
14
P to pass through the positioning holes
10
P.
Then, a clearance between adjacent circuit members (
1
P,
2
P) of the multilayer circuit structure is filled with an insulating resin
20
P, and an electrically conductive film
30
P is formed in a through-hole obtained by removing the pin
14
P from the positioning holes
10
P to obtain a layer-to-layer connection in the multilayer circuit structure, as shown in FIG.
19
B.
According to this method, it is possible to prevent the occurrence of pinholes or short mold at the clearance between the circuit members (
1
P,
2
P), a break in the conductive circuit pattern (
5
P,
6
P), and a flaking caused between layers, and also provide the multilayer circuit structure having high-density wiring. However, in this method, since the plural injection-molded circuit members are laminated, and the insulating resin is filled in the clearance between the adjacent circuit members (
1
P,
2
P), an increase in thickness of the obtained multilayer circuit structure becomes a problem.
On the other hand, Japanese Patent Early Publication No. 7-249873 discloses a multilayer-circuit molded article and a method of manufacturing the same. In this method, as shown in
FIG. 20A
, a resin-molded inner substrate
1
S having protrusions
2
S on its top and bottom surfaces is formed. Then, first circuit patterns (
3
S,
4
S) are formed at required regions on the top and bottom surfaces of the inner substrate
1
S by electroless plating. After the inner substrate
1
S having the first circuits (
3
S,
4
S) is placed in a mold cavity, a resin-molded outer substrate
5
S is formed on the inner substrate
1
S by injection molding such that only the first circuit patterns on the top surfaces of the protrusions
2
S of the inner substrate
1
S are exposed outside, as shown in FIG.
20
B. Next, second circuit patterns
8
S are formed at required regions on the outer substrate
5
S by electroless plating. The second circuit patterns
8
S can be connected to the first circuit patterns (
3
S,
4
S) on the protrusions
2
S to make a layer-to-layer connection between the inner and outer substrates (
1
S,
5
S). In addition, an electrical connection between the second circuit patterns
8
S on the top and bottom surfaces of the outer substrate
5
S can be made by a through-hole plating
6
S.
In this method, since a plating solution for electroless plating can sufficiently contact the surfaces of the protrusions
2
S, there is an advantage that the plating step can be performed with reliability. In addition, it is possible to avoid a situation that flowability of the plating solution decreases as higher levels of integration. These are effective to form the layer-to-layer connection with a high degree of reliability. However, since the inner substrate
1
S having the first circuit patterns (
3
S,
4
S) is placed again in the mold cavity, and then the outer substrate
5
S is formed around the inner substrate
1
S by injection molding, the procedure for forming a multilayer structure of the resin-molded substrates may become complicated. In addition, there is a problem that the thickness of the multilayer structure increases.
Thus, these conventional techniques still have plenty of room for improvement from the viewpoints of achieving a higher integration of the multilayer circuit board and particularly the MID having a multilayer circuit, while maintaining a high degree of reliability of the layer-to-layer connection.
SUMMARY OF THE INVENTION
In view of the above problems, a concern of the present invention is to provide a multilayer circuit board, and particularly a molded interconnect device (MID) having a multilayer circuit of a reduced thickness, in which a layer-to-layer connection(s) is formed with high reliability.
That is, the multilayer circuit board of the present invention comprises:
a substrate having a first surface and a second surface extending from an end of the first surface at a required angle relative to the first surface;
a multilayer circuit formed on the first surface of the substrate and composed of a plurality of circuit layers, each of which is provided with a conductive layer having a required circuit pattern and an insulation layer formed on the conductive layer by means of film formation;
a second conductive layer formed on the second surface of the substrate, by which the layer-to-layer connection of the multilayer circuit is made.
In a preferred embodiment of the present invention, the second surface of the substrate is a side surface of a projection on the first surface. In particular, it is preferred that the substrate has a third surface extending at a different level from the first surface and a fourth surface extending from the other end of the first surface to an end of the third surface, and the multilayer circuit is formed on the first, third and fourth surfaces of the substrate, and the second conductive layer is formed on a side surface of a projection on the first surface to make the layer-to-layer connection of the multilayer circuit. In this case, it is possible to form the layer-to-layer connection(s) of the multilayer circuit on a substrate for MID, for example, a substrate used in a first embodiment of the present invention and having configurations shown in
FIG. 1A
, with high degrees of reliability and flexibility in circuit design. When the second conductive layer is a plurality of second conductive layers to obtain plural layer-to-layer connections of the multilayer circuit, it is preferred that each of second conductive layers is separated from an adjacent second conductive layer in the thickness direction by a second insulation layer.
In a further preferred embodiment of the present invention, the first surface is a top surface of the substrate, and the second surface is a side surface of the substrate. In addition, it is preferred that the multilayer circuit has an aperture, through which a part of the first surface is exposed, and an electronic device is mounted in a concave formed in the exposed first surface, and an electrical connection between the multilayer circuit and the electronic device is made by a third conductive layer formed on an inner surface of the concave.
Another concern of the present invention is to provide a method of manufacturing the multilayer circuit board described above. That is, the method comprises the steps of:
providing a substrate having a first surface and a second surface extending from an end of the first surface at a required angle
Masaki Yasufumi
Muto Masahide
Sawada Kazuo
Uchinono Yoshiyuki
Cuneo Kamand
Matsushita Electric & Works Ltd.
Osha & May L.L.P.
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