Image analysis – Image compression or coding – Interframe coding
Reexamination Certificate
2000-12-21
2004-02-17
Johnson, Timothy M. (Department: 2625)
Image analysis
Image compression or coding
Interframe coding
C382S239000, C375S240030
Reexamination Certificate
active
06694060
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally pertains to digital video compression, and is particularly directed to allocating a frame bit-size in a group of pictures of a first compression-encoded digital video signal that is to be spliced following transmission of the group of pictures with a second compression-encoded digital video signal.
Referring to
FIG. 1
, a prior art digital video compression-and-decompression system that is adapted for splicing a compression-encoded digital video signals includes a controller
10
, an encoder
12
, an encoder output buffer
14
, a signal splicer/multiplexer
16
, a decoder input buffer
18
and a decoder
20
. The encoder
12
compress the bit size of each frame in each group of pictures of a first digital video signal
22
a
into a variable allocated number of bits. The encoder
12
concatenates the compressed frames to provide a first compression-encoded digital video signal
24
a
, which is transmitted from the encoder buffer
14
to the signal splicer/multiplexer
16
.
The splicer/multiplexer
16
splices the last first-signal group of pictures encoded before the splice with a first group of pictures in a second compression-encoded digital video signal
24
b
transmitted after the splice to provide a spliced signal
26
. The first and second compression-encoded signals
24
a
,
24
b
are spliced during a switching interval that begins at a predetermined switching time T and ends at a splice point S, as shown in FIG.
2
. The decoder
20
decodes the spliced signal
26
and reconstructs the video frames.
The controller
10
controls the operation of the encoder
12
. In doing so, the controller
10
regulates the encoding rate and allocates the compressed bit-size for each frame.
The second compression-encoded digital video signal
24
b
may be provided from the same type of combination of encoder and controller as provides the first compression-encoded digital video signal
24
a.
The bit-encoding rate can be variable. The encoder buffer
14
and the decoder buffer
20
each may contain more than one frame at any time in view of any variation in the bit-encoding rates and the variation in the sizes of each encoded video frame.
When a splice of first and second compression-encoded digital video signals encoded by different video signal services is scheduled to occur, in order for such splice to be seamless, all frames within the last first-signal group of pictures before the splice are encoded before a predetermined switching time T, at which a switching interval of duration SI commences, and the first frame of the first second-signal group of pictures following the splice is not transmitted until a splice time S, which occurs at the conclusion of the switching interval. See FIG.
2
. No video frames are sent during the switching interval.
For the splice point to be seamless, the first frame of the first group of pictures of the second signal following the splice must have a predetermined vbv-delay. The vbv-delay is an interval between the time when the first bit of a frame enters the decoder buffer and the decoding time for that frame, as shown in FIG.
2
.
The controller
10
so allocates the bit size for each frame as to cause the subjective visual quality to be uniform across all video frames. Some video frames require larger bit budgets than others due to the nature of their encoding frame types (e.g. I-frames, B-frames and P-frames), or because the pictures represented by such frames are more difficult to compress due to complex movements, changing brightness levels or scene changes in the pictures. Accordingly, the controller
10
allocates a bit budget for a current frame in a current group of pictures in accordance with the number of remaining bits for the current group of pictures, frame coefficients for different frame types and whether or not the current frame involves a scene change
The controller
10
also so allocates the bit size for the different frames as to ensure that as the encoded frames are received, the decoder buffer
18
does not overflow or underflow. Decoder buffer underflow occurs when not all of the bits associated with a given video frame have arrived in the decoder buffer when the decoder begins to decode the given video frame. The controller
10
prevents underflow and overflow of the decoder buffer
18
by imposing respective maximum and minimum limits on the bit size of each video frame that the encoder
12
compresses.
Prior to encoding a current frame, the controller
10
determines minimum and maximum bit-sizes for the current frame for preventing overflow and underflow of the current frame from the decoder buffer
18
to the decoder
20
by estimating what the decoder buffer fullness DBF will be at the decoding time for the current frame in accordance with the bit-encoding rates and the bit sizes of the frames already encoded.
In order to prevent buffer underflow, the controller
10
determines the maximum bit size for the current frame as follows:
CF
MAX
=DBF
(
dt/cf
). {Eq. 1}
wherein DBF(dt/cf) is an estimate of the decoder buffer fullness at the decoding time of the current frame.
DBF
(
dt/cf
)=
B
(
ct−dt
)−
EBF
(
ct
) {Eq. 2}
wherein B(ct-dt) is an estimate of the number of bits transmitted by the encoder buffer
14
from the current time until the decoding time of the current frame and EBF(ct) is the current fullness of the encoder buffer
14
, as determined of a count of the bits in the already encoded frames that are still in the encoder buffer
14
.
In order to prevent buffer overflow, the controller
10
determines the minimum bit size CF
MIN
for the current frame as follows:
CF
MIN
=DBF
(
dt/cf
)−
DBF
(
dt
f
)+
B
(
dt/cf−dt
f
) {Eq. 3}
wherein DBF(dt
f) is an estimate of the decoder buffer fullness at the decoding time of the next frame, which is determined in the same manner as DBF(dt/cf) for the current frame is determined in accordance with Eq. 1 and Eq. 2, and B(dt/cf-dt
f) is an estimate of the number of bits transmitted by the encoder buffer
14
from the decoding time of the current frame until the decoding time of the next frame.
However, the above-described methods of determining the maximum and minimum bit sizes for the current frame of the first compression-encoded signal
24
a
are premised upon the assumption that the number of bits transmitted by the encoder buffer
14
from the decoding time of the current frame until the respective decoding times of the current frame and the next frame are known to the controller
10
, which assumption in turn is premised upon the bit-encoding rate also being known to the controller
10
. When the above-described method is used for encoding the frames of a group of pictures of a first compression-encoded digital video signal
24
a
that is to be spliced with a second compression-encoded digital video signal
24
b
that has a variable bit-encoding rate, the above-described method is not reliable for encoding a current frame that is not decoded until after the predetermined switching time T because the bit-encoding rate of the second encoded signal is not known to the controller
10
that is allocating the frame size of the first compression-encoded signal
24
a.
SUMMARY OF THE INVENTION
The present invention provides a controller for allocating a bit size for a current frame in a group of pictures of a first compression-encoded digital video signal that is to be spliced following transmission of the group of pictures with a second compression-encoded digital video signal, wherein the signals are spliced during a switching interval that begins a predetermined switching time after commencement of encoding the current frame of the first signal, and the spliced signals are buffered by a decoder buffer and then decoded by a decoder, the controller comprising:
means for determining, prior to encoding the current frame, a maximum bit size for the current frame for preventing an underflow of the current fram
Chen Jingyang
Liu Vincent
Wu Siu-Wai
Callan Edward W.
Choobin Barry
General Instrument Corporation
Johnson Timothy M.
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