Communication port-powered digital communication interface...

Pulse or digital communications – Transceivers – Transmission interface between two stations or terminals

Reexamination Certificate

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Details

C375S377000, C379S021000, C379S027070

Reexamination Certificate

active

06751253

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates in general to telecommunication systems and equipment therefor, and is particularly directed to a new and improved test set interface, through which software for reconfiguring or upgrading the functionality of a telephone craftsperson's butt-in test set may be downloaded into the butt set. Advantageously, the interface is configured to be powered externally by the communication paths to which it is connected, so as to obviate the need for an internal power source, and allow it to be packaged as a self-contained compact, plug-in module.
BACKGROUND OF THE INVENTION
Accompanying the continuing and rapid-paced advances in telecommunications technology is the need to upgrade or reconfigure a variety of equipment and system components. To accommodate this requirement, while avoiding a wholesale replacement of the internal electronics, currently manufactured device implementations customarily include a software-upgradable micro-controller as their principal functionality determining component. As a non-limiting example,
FIG. 1
diagrammatically illustrates a programmable butt-in telephone test set (or butt set)
10
, having of a user interface
11
(including a keypad, associated display and audio transceiver components), through the operation of which a telephone craftsperson may test the operation of a variety of telephone circuits, including those associated with both analog (plain old telephone service) or POTS and digitally formatted communication services.
As is further shown in the reduced complexity functional diagram of
FIG. 2
, in addition to including a communication port
12
and associated telco interface circuit
13
, through which the butt set
10
is connectable to (e.g., bridged onto tip and ring leads of) a line (e.g., copper wireline pair)
14
under test, the butt set also includes a digital communication port
16
(such as an RS-232 port) and an associated digital signaling interface circuit
17
, through which digital communications (including those associated with software upgrades) with the test set's resident control processor
18
may be conducted, typically from a host workstation (e,.g., personal computer (PC))
20
.
Since respective electrical parameters (e.g., respective voltage levels) of the digital communication signals employed by the host workstation and butt set are not necessarily the same (and can be expected to be directly incompatible) and, moreover, since the test set may be powered by a relatively large DC voltage of a telephone line, it is necessary to provide isolation circuitry between the two units that ensures both safety of operation and maintains the proper signal integrity across the link. Because this circuitry is typically complex and powered by a self-contained or externally connected power source, it is not only a relatively cumbersome piece of equipment, but is costly to manufacture and maintain.
SUMMARY OF THE INVENTION
In accordance with the present invention, these problems are effectively obviated by a compactly packaged, electro-optical firewall-based, digital communication interface, which is configured to not only provide digital communications between the host computer and the butt set (including but not limited to the downloading of software), but to draw its power from the respective butt set and PC communication paths to which it is connected, and thereby eliminate the need for a power source of its own.
To this end, the butt set interface of the present invention includes a first set of host-associated ports that are adapted to be coupled to an auxiliary (serial) communication port of the host computer, and a second set of butt set-associated ports that are adapted to be coupled to a programmable craftsperson's telephone butt set. These two sets of ports are coupled to the internal voltage translation and throughput—isolation circuitry of the test set. This circuitry includes a pair of host and butt set sub-circuits that are configured to be coupled to and translate voltage levels supplied from each of the host and butt set to those needed by the internal circuit components of the interface, and to provide opto-electronic firewalls in digital communication paths therethrough. Since this obviates the need for an internal power source, it allows the interface to be readily packaged as a self-contained module, having respective plug-in connectors for each of the host and butt-set associated interface ports.
The host-side ports of the test set interface include a pair of power ports and a pair of (transmit and receive) digital communication ports. One of the power ports is coupled to ground; the other power port is coupled to receive a serial DTR signal from the host computer, and serves as first source of DC voltage that is translated into a second DC voltage employed by host-associated circuit components of the interface. The host-side transmit digital communication port is coupled through a host-to-butt set opto-electronic coupler (opto-isolator) and output buffer amplifier to a shared, bidirectional digital communication port on the butt set side of the interface. This opto-electronic coupler provides host-to-butt set signal throughput for and a signal integrity firewall between the host and butt set ports of the interface. The output circuitry of this opto-electronic coupler, associated with the butt set side of the interface, is powered by a DC voltage derived from the butt-set.
The host-side transmit digital communication port is further coupled to a one-shot circuit, which is used to controllably enable a butt set-host opto-electronic coupler (opto-isolator). This butt set-to-host opto-electronic coupler provides butt set-to-host signal throughput for, and a signal integrity firewall for digital communication signals from the butt set to the host. The one-shot is operative to disable the butt set-host opto-electronic coupler during host-to-butt set communications, and thereby prevent host-to-butt communication signals applied to the host side digital input port from being looped back to the host side digital output port.
The butt set interface ports include a pair of power ports and a bidirectional digital communication port. One butt set side power port is coupled to ground, while the second butt set side power port is coupled to receive a DC voltage from the butt set, and serves as second source of DC voltage required by butt set associated components of the circuitry of the interface. The bidirectional digital communication port is coupled through respective buffer amplifiers to the two opto-isolators.
When the interface has its plug-in connectors for the host and butt-set interface ports coupled to corresponding power—communication ports of the host processor and butt set, it draws power from and internally generates a set of DC voltages required by the internal circuits of the host side and butt set side portions of the interface. For digital communications in the host-to-butt set direction, as in the case of a performing a software upgrade to the butt set from the host, signals applied to the digital communication port are coupled to the host-to-butt set opto-isolator and to the one-shot. The opto-isolator provides host-to-butt set signal throughput and signal integrity isolation between the host and the butt set, while the one-shot circuit disables the other (butt set-host) opto-isolator, to prevent the incoming host-to-butt communication signals from being looped back to the host through the other opto-electronic coupler. Butt set-sourced digital communications are coupled through the butt set-to host opto-isolator to the butt set-to-host digital output port for delivery to the host.


REFERENCES:
patent: 5224154 (1993-06-01), Aldridge et al.
patent: 5369687 (1994-11-01), Farkas
patent: 5377259 (1994-12-01), Butler et al.
patent: 5473552 (1995-12-01), Chen et al.
patent: 5896415 (1999-04-01), Owens et al.
patent: 6192125 (2001-02-01), Norsworthy et al.

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