FPGA architecture including direct logic function circuit to I/O

Details FPGA architecture including direct logic function circuit to I/O FPGA architecture including direct logic function circuit to I/O

1993-10-20

1996-04-16

Auve, Glenn A.

Boots, shoes, and leggings

364244, 364DIG1, 371 221, 395800, G06F 1300, H03K 19177

Patent

active

055091288

ABSTRACT:
A user-programmable FPGA architecture includes a plurality of logic function circuits having inputs and outputs disposed on an integrated circuit. A plurality of input/output (I/O) modules are also disposed on the integrated circuit and communicate with I/O pads on the integrated circuit. The I/O modules each include: (1) an input buffer having an input connected to an I/O pad on the integrated circuit and an output connected to an output node, and (2) an output buffer having an input connected to an input node, an output connected to the I/O pad, and a control input connected to a control node for placing the output buffer into a high impedance state. A general interconnect structure disposed on the integrated circuit includes a plurality of interconnect conductors which may be connected to one another, to the inputs and outputs of the logic function circuits, and to the I/O modules by programming user-programmable interconnect elements. Direct interconnections are made between the inputs of selected ones of the logic function circuits and the output nodes of selected ones of the I/O modules. Direct interconnections are made between the outputs of selected ones of the logic function circuits and the input nodes of selected ones of the I/O modules. Direct interconnections are made between the outputs of selected ones of the logic function circuits and the control nodes of selected ones of the I/O modules.

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