Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2003-09-05
2004-11-09
Goudreau, George A. (Department: 1763)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S717000, C438S725000, C438S734000, C216S067000, C216S071000
Reexamination Certificate
active
06815366
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2002-274617, filed in Sep. 20, 2002, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a method for etching organic insulating films and a method for fabricating semiconductor devices, more specifically to a method for etching organic insulating films which can form vertically etching profiles having little bowing and can have little corner loss of the hard mask, and a method for fabricating the semiconductor device using the etching method.
As semiconductor devices are larger scaled and more integrated, design rules for the interconnections are more diminished with generations. Conventionally, the metal interconnection layer has been formed by depositing the interconnection material and patterning the deposited interconnection material by lithography and dry etching. However, as generations advance, the technical limits have been found. As a new process which takes over the conventional interconnection forming process, the so-called damascene process in which after groove patterns or hole patterns have been formed in the interlayer insulating film, interconnection material is buried in the grooves and holes is recently used. The damascene process can easily form interconnection with low resistance materials, such as copper, etc., which are difficult for reactive etching, and is very effective to form low resistance interconnection having micronized pattern.
As the interconnections are more micronized, the interconnection spacing is also more decreased, and increased parasitic capacitance formed via the inter-layer insulating film is a cause for hindering the speed-up of semiconductor devices. Thus, several considerations have been made to utilize organic insulating materials (low-k materials) having dielectric constants lower than those of the conventionally used silicon oxide film and the silicon nitride film as the inter-layer insulating films. Parts of the organic materials have been already come in practice. Organic spin-on materials, such as an organic-based polymer called “SiLK” (registered trademark) from The Dow Chemical Company, and an organic-based polymer called “FLARE” (registered trademark) from Honeywell Electronic Materials, are known as the organic insulating materials.
Various studies have been made of semiconductor devices using organic insulating materials as the inter-layer insulating films, and conductors which are based on copper buried in the organic insulating films, and methods for fabricating the semiconductor devices.
The etching of organic insulating films still has more unknown points in the etching mechanism than that of silicon oxide-based insulating films. In the present environments, in etching organic insulating materials into vertically etching profile, the processing control by means of sidewall protection films is essential. In many cases of etching organic insulating materials containing no Si, such as the above-described SiLK, FLARE, etc., hydrogen-based (e.g., H
2
/N
2
, NH
3
, etc) plasmas are used in place of fluorocarbon (CF)-based plasmas. In the etching using such gases, CN-based sidewall protection films are formed on etched surfaces, which make it possible to control cross-sectional etching profiles.
On the other hand, parallel plate dual frequency excitation etching systems are noted as etching systems suitable for the etching process for micronized devices of the next generation. The parallel plate dual frequency excitation etching system applies high frequencies of different frequencies to the lower electrode supporting a wafer and to the upper electrode opposed to the lower electrode to thereby excite plasma to etch the wafer. The parallel plate dual frequency excitation etching system is characterized by rapid, homogeneous and satisfactory etching under low pressure which have not been conventionally found, and little charge-up damage. The parallel plate dual frequency excitation etching system has high plasma generating efficiency, and can attain higher etching rates in comparison with the conventional etching systems. The etching of organic insulating films by using the parallel plate dual frequency excitation etching system is described in, e.g., in Japanese published unexamined patent application No. 2001-110784.
Problems of etching organic insulating films by the parallel plate dual frequency excitation etching system are bowing, and the corner loss of the hard mask. The bowing means the phenomena that side etching takes place at the middle of a hole to widen the hole diameter. The corner loss of the hard mask means the phenomena that the pattern edge of the hard mask used in etching organic insulating films are etched.
When the organic insulating films are etched by the parallel plate dual frequency excitation etching system, no bowing takes place in the etching processing using an N
2
/H
2
gas, but amounts of the corner loss of the hard masks are large. On the other hand, in the etching process using an NH
3
gas, the amounts of the corner loss of the hard masks are small, but the bowing takes place.
FIGS. 21A and 21B
are scanning electron microscope images showing cross-sectional etching profiles of samples each having a SiLK film and a silicon oxide film formed on a silicon oxide film in which the SiLK film is etched with the upper silicon oxide film as the hard mask.
FIG. 21A
shows the sample, which was etched with an N
2
/H
2
gas.
FIG. 21B
shows the sample, which was etched with an NH
3
gas.
As shown in
FIG. 21A
, the sample etched with the N
2
/H
2
gas has the corner of the silicon oxide film used as the hard mask etched, and it is seen that the corner loss took place. As shown in
FIG. 21B
, the sample etched with the NH
3
gas has the SiLK film etched even in the region below the silicon oxide film used as the hard mask, and it is seen that the bowing took place.
When a vertically etching profile is formed by etching, generally the bias electric power must be higher to increase ion energy so as to set an injection angle on a wafer vertical. However, the corner loss is increased as increasing the bias electric power. On the other hand, when etching conditions which decrease the corner loss amount of the hard mask are used, the isotropic etching component is increased, which increases the bow amplitude.
As described above, in etching an organic insulating film, the bow amplitude, and the corner loss amount of the hard mask trade off each other. It is difficult to make compatible with each other.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method for etching an organic insulating film which can form vertically etching profiles without little bowing and causes little corner loss of hard mask, and a method for fabricating the semiconductor device using the etching method.
According to one aspect of the present invention, there is provided a method for etching an organic insulating film in which a first RF power having a first frequency is applied to a first electrode with an object-to-be-processed having an organic insulating film mounted on, a second RF power having a second frequency different from the first frequency is applied to a second electrode opposed to the first electrode, whereby plasma of gas containing NH
3
is generated to etch the organic insulating film, the first RF power and the second RF power being controlled to make a Vpp value of a voltage applied to the first electrode below 500 V.
According to another aspect of the present invention, there is provided a method for fabricating a semiconductor device comprising the step of: sequentially forming an organic insulating film and an inorganic insulating film on a substrate; patterning the inorganic insulating film; and etching the organic insulating film with the patterned inorganic insulating film as a mask, in the step of etching the organic insulating film, a method for etchin
Fujitsu Limited
Goudreau George A.
Westerman Hattori Daniels & Adrian LLP
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