Charge pump current compensating circuit

Details Charge pump current compensating circuit Charge pump current compensating circuit

2002-09-09

2004-08-03

Zweizig, Jeffrey (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

Reexamination Certificate

active

06771114

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to a charge pump current compensating circuit that may be used for a phase-locked loop (PLL) and/or a delay-locked loop (DLL) and more particularly to charge pump current compensating circuit that provides compensation so that charging current and discharge current may be essentially equal.
BACKGROUND OF THE INVENTION
A charge pump current compensating circuit can be used to compensate current supplied to a low-pass filter (LPF) of a phase locked loop (PLL) and/or a delay locked loop (DLL).
Referring to
FIG. 6
, a block schematic diagram of a phase locked loop (PLL) is set forth and given the general reference character
600
.
PLL
600
includes a phase comparator
1
, a conventional charge pump circuit (CP)
2
, and a voltage controlled oscillator (VCO)
3
.
Phase comparator
1
receives a reference input signal REFERENCE INPUT and an oscillating output signal OUTPUT and provides an up pulse UP and down pulse DN. Phase comparator
1
compares each phase of reference input signal REFERENCE INPUT and oscillating output signal OUTPUT. When reference input signal REFERENCE INPUT leads oscillating output signal OUTPUT, up pulse UP is provided. When reference input signal REFERENCE INPUT lags oscillating output signal OUTPUT, down pulse DN is provided. Conventional charge pump circuit
2
generates control current for charging or discharging a capacitor using the up pulse UP or the down pulse DN provided from phase comparator
1
. Voltage controlled oscillator
3
provides oscillating output signal OUTPUT based upon a control voltage generated by conventional charge pump circuit
2
. In this way, conventional charge pump circuit
2
in phase locked loop
600
controls charging current and discharge current for a capacitor of a low pass filter (LPF). By using a low pass filter (providing a sufficiently large capacitor value), the stability of an oscillating output signal OUTPUT is increased.
Referring now to
FIG. 7
, a circuit schematic diagram of conventional charge pump circuit
2
is set forth.
Conventional charge pump circuit (CP circuit)
2
includes PMOS (p-type metal oxide semiconductor) transistors (P
1
to P
4
), NMOS (n-type metal oxide semiconductor) transistors (N
1
to N
6
), constant current source
11
, and capacitor C.
Constant current source
11
has a current amplified by a current mirror that includes PMOS transistors (P
2
and P
4
) for charging capacitor C and by a current mirror formed by NMOS transistors (N
2
and N
4
) for discharging capacitor C. In this way, a desired constant current (for example, ten times current
11
) is used to provide a predetermined voltage Vcont on capacitor C forming a low pass filter. Up pulse UP is provided to the gate of PMOS transistors P
1
to control the charging current and down pulse DN is provided to the gate of NMOS transistor N
1
to control the discharge current. Conventional charge pump circuit
2
varies the potential of voltage Vcont on capacitor C forming a low pass filter and thereby varying a frequency or delay time in phase locked loop
600
.
Referring to
FIG. 8
, a graph illustrating transfer characteristics of conventional charge pump circuit
2
is set forth.
As shown in
FIG. 8
, symmetrical voltage-current characteristics of PMOS transistor P
2
and NMOS transistor N
2
are illustrated with solid lines. A stable operating point of conventional charge pump circuit
2
gives a potential of voltage Vcont at point Al that can be supplied to voltage controlled oscillator VCO. However, when the output impedances of PMOS transistor P
2
and NMOS transistor N
2
varies due to process variations, the values (Ids) of charging current and discharge current become different.
For example, when the output impedance of NMOS N
2
varies (from a characteristic illustrated as the solid line in
FIG. 8
to a characteristic shown as a dashed line) due to process variations, voltage Vcont has a stable operating point at point A
2
. As a result, voltage Vcont can varies to point A
2
through charge and discharge.
Referring to
FIG. 9
, a graph illustrating transfer characteristics of conventional charge pump circuit
2
is set forth. The transfer characteristics of
FIG. 9
illustrate maximum and minimum points at which voltage Vcont and charging/discharge current are locked.
FIG. 9
illustrates the maximum and minimum values at which NMOS and PMOS transistors (N
2
and P
2
) are locked. When PMOS P
2
is locked at point (A
1
), NMOS transistor N
2
is locked at point (B
2
) or when PMOS P
2
is locked at point (A
2
), NMOS transistor N
2
is locked at point (B
1
) respectively. In this way, values of charging and discharging current (Ids) become different. As a result, a desired voltage Vcont cannot be acquired because of variations of points (B
2
) through discharge and variation of points (A
1
) through charging, or a desired voltage Vcont cannot be acquired because of variations of points (B
1
) through discharge and variation of points (A
2
) through charging. Also, the output impedances decrease as the gate length (L) of transistors forming charge pump is reduced. Thus, as transistors are reduced in size, process variations may cause greater effects and the difference between charging current and discharge current can become even greater.
A conventional charge pump circuit used for a PLL is described above. However, a conventional charge pump circuit can be similarly used for a DLL.
In a conventional charge pump circuit as described above, a charging current and a discharge current for a capacitor may be different due, for example, to process variations. Therefore, a conventional charge pump circuit may not keep an output potential (Vcont) in a desired range as illustrated in
FIGS. 8 and 9
. Due to this, the output potential (Vcont) may deviate from a desired range which may cause the performance of a PLL or DLL including the conventional charge pump circuit to deteriorate.
In view of the above discussion, it would be desirable to provide a charge pump current compensating circuit which may provide an output potential essentially constant or in a desired range.
SUMMARY OF THE INVENTION
According to the present embodiments, a charge pump current compensating circuit (
4
) including feedback so that a difference between a charging current and a discharging current may be reduced is disclosed. A charge pump current compensating circuit may include a current source leg, a first current mirror leg, a second current mirror leg, and a compensation circuit. A compensation circuit may provide compensation to control insulated gate field effect transistors (IGFETs) so that a charging current and a discharging current may be essentially the same even when output impedances of IGFETs are different.
According to one aspect of the embodiments, a charge pump compensating circuit may control a charge current for charging a capacitor and a discharge current for discharging a capacitor based on a phase comparator output. The charge pump current compensating circuit may include a compensation circuit coupled to receive a voltage output from the capacitor and provide compensation so that the charge current may be essentially the same value as the discharge current.
According to another aspect of the embodiments, the capacitor may be a capacitance of a low pass filter.
According to another aspect of the embodiments, the compensation circuit may prevent the voltage output from essentially varying.
According to another aspect of the embodiments, the compensation circuit may compensate for differences in a first output impedance of a p-type insulated gate field effect transistor (IGFET) and a second output impedance of a n-type IGFET so that the charge current may be essentially the same value as the discharge current.
According to another aspect of the embodiments, the charge pump current compensating circuit may include an essentially constant current circuit and a current mirror circuit. The essentially constant current circuit may provide a bias output. The current mirror circuit ma

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