Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1996-06-18

1998-01-13

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518522, 36518529, 36518533, 365218, G11C 1134, G11C 700

Patent

active

057086036

ABSTRACT:
An object of the invention is to vary data width by changing over the readout mode, to change over the number of operating sense amplifiers in order to minimize the readout current, and to reduce the power consumption. A switch circuit operates only half of sense amplifiers by a first EN1 signal when the output data width is set at 8 bits by data width control signal BYTE. At this time, other sense amplifiers are not put in action, and hence the power consumption is saved. When the external output is 16 bits, all sense amplifiers are put in operation. Besides, in the case of internal readout operation such as verification by internal state signal RUN, all sense amplifiers are operated to perform an efficient high speed operation.

REFERENCES:
patent: 5262990 (1993-11-01), Mills et al.
patent: 5504875 (1996-04-01), Mills et al.
patent: 5557572 (1996-09-01), Sawada et al.

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