Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate
2002-11-21
2004-10-19
Hoff, Marc S. (Department: 2857)
Data processing: measuring, calibrating, or testing
Testing system
Of circuit
C702S057000, C702S064000, C702S118000, C714S025000, C714S732000, C326S030000, C712S228000
Reexamination Certificate
active
06807504
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to testing computer motherboards. More particularly, the invention relates to an apparatus for testing various I/O ports of a computer motherboard.
2. Description of the Related Art
While a central processing unit (CPU) performs most computer jobs, it is really a motherboard that brings it all together to turn a CPU into a modern personal computer. Typically, a computer motherboard includes many input/output (I/O) ports for connecting to various peripherals, and these I/O ports are arranged on the personal computer. It is necessary to test every I/O port of the computer motherboard as much as feasible during design phase or in the final stages of manufacture. Some limited functional tests can be performed by a basic input-output system (BIOS) routine. The BIOS is low-level software that controls devices on the motherboard. The CPU executes the BIOS code upon power-up or reboot, where the BIOS code is stored in a system non-volatile memory on the computer motherboard. The BIOS typically first runs a power-up self-test (POST), which is a series of diagnostic tests to ensure the basic hardware is operating properly. The BIOS also initializes basic hardware operations and some basic video functions. The BIOS then searches for and initiates an operating system, such as Microsoft Windows or Linux.
It is often convenient to execute extensive diagnostic test applications under a window-based operating system so as to test various parts of the computer. Unfortunately, there are several disadvantages to testing the I/O ports of the motherboard as described above. The BIOS code does provide some I/O testing at the system level, but its diagnostic capability is limited. Any messages typically provided, for example, only indicate that a problem exists, but rarely identify what the problem is or where it is. Also, the motherboard under test must load an operating system from a storage device in order to execute diagnostic programs, which takes a significant amount of time. The above schemes for testing I/O ports of a computer motherboard are complicated and time consuming. Further, there is no integrated test kit for testing frequently used I/O ports on today's personal computers.
Accordingly, what is needed is a universal test kit for effectively testing frequently used I/O ports of a computer motherboard. The universal test kit should be simple to allow rapid testing of the I/O ports on the basis of each I/O port's characteristics. Furthermore, the universal test kit should accurately report which pin of an abnormal I/O port is not operating properly.
SUMMARY OF THE INVENTION
The present invention is generally directed to an apparatus for testing I/O ports of a computer motherboard. According to one aspect of the invention, the apparatus of the invention includes a circuit board, a first connector, a second connector, a first test circuit and a second test circuit. The first and the second connectors are electrically connected to the circuit board. The first connector has a plurality of parallel interface data pins, status pins and control pins. With the first connector, the apparatus of the invention can establish electrical connections with corresponding pins of a parallel port of the computer motherboard. The first test circuit is coupled to the first connector, which includes a logic device coupled to the parallel interface data pins and control pins on the first connector. The logic device logically operates the parallel interface data pins and control pins to provide a set of logic signals to a portion of the parallel interface status pins on the first connector. The second connector includes a pair of universal serial bus (USB) interface differential data pins to establish electrical connections with corresponding pins of a USB port of the computer motherboard. The second test circuit is coupled to the second connector, in which a first resistor is connected between a first voltage source and one of the USB interface differential data pins, a second resistor is connected between a second voltage source and the other USB interface differential data pin, and a third resistor is connected between the pair of USB interface differential data pins. In essence, the first, the second and the third resistors are connected in series.
According to another aspect of the invention, a universal test kit for testing I/O ports of a computer motherboard is disclosed. The universal test kit is connected to I/O ports of a computer motherboard under test. The computer motherboard under test provides a plurality of I/O ports including a parallel port and a USB port. The computer motherboard under test basically includes a non-volatile memory and a central processing unit (CPU). The non-volatile memory stores a test code, instead of a basic input-output system (BIOS) code, to initialize the computer motherboard under test and test the I/O ports. Thus, the CPU can boot from the test code in the non-volatile memory for executing the test code to test the I/O ports of the computer motherboard under test. The universal test kit comprises a first connector, a second connector, a first test circuit and a second test circuit. The first connector has a plurality of parallel interface data pins, status pins and control pins. The universal test kit can establish electrical connections with corresponding pins of the parallel port of the computer motherboard under test through the first connector. The first test circuit is coupled to the first connector, which includes a logic device coupled to the parallel interface data pins and control pins on the first connector. The logic device logically operates the parallel interface data pins and control pins to provide a set of logic signals to a portion of the parallel interface status pins on the first connector. The second connector includes a pair of USB interface differential data pins to establish electrical connections with corresponding pins of the USB port of the computer motherboard under test. The second test circuit is coupled to the second connector, in which a first resistor is connected between a first voltage source and one of the USB interface differential data pins, a second resistor is connected between a second voltage source and the other USB interface differential data pin, and a third resistor is connected between the pair of USB interface differential data pins. Note that the first, the second and the third resistors are connected in series.
REFERENCES:
patent: 5357519 (1994-10-01), Martin et al.
patent: 5572669 (1996-11-01), Sabapathi et al.
patent: 5630048 (1997-05-01), La Joie et al.
patent: 6304983 (2001-10-01), Lee et al.
Jex, ‘Flash Memory BIOS for PC and Notebook Computers’, 1991, Intel Corporation, pp. 692-695.
Chen Zhiguo
Huang Chih-Wei
Desta Elias
Hoff Marc S.
Rabin & Berdo P.C.
Via Technologies Inc.
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