Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2001-09-25
2004-08-10
Arbes, Carl J. (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S825000, C029S830000, C029S846000, C029S852000
Reexamination Certificate
active
06772515
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of producing a multilayer printed wiring board and to a multilayer printed wiring board produced by the method of producing a multilayer printed wiring board.
2. Description of Background Art
In general, methods of producing a multilayer printed wiring board are roughly classified into two typical methods. One is a laminate-en-bloc method in which a plurality of double-sided substrates, as core substrates, each having a specified circuit pattern formed on each side are laminated and adhesive bonded en bloc through prepreg. Another is a build-up method in which a specified circuit pattern and an insulating resin layer are formed one after another.
In the laminate-en-bloc method, a substrate formed by laminating copper foil to cloth or non-woven fabric made of glass or aramide impregnated with epoxy resin or phenol resin, i.e., a copper clad laminate, is used as a core substrate. Through holes are formed in the copper clad laminate by drilling or laser, first, and then are made to be electrically conductive by copper-plating. Thereafter, the copper foil is formed into a specified circuit pattern by etching, to thereby produce a double-sided substrate. Sequentially, two or more double-sided substrates thus produced are laminated and adhesive bonded to each other through prepreg to thereby produce a multilayer printed wiring board.
On the other hand, in the build-up method, a copper clad laminate having a specified circuit pattern formed thereon or a multilayer printed wiring board produced by the laminate-en-bloc method is used as the core substrate. Insulating resin is coated on the core substrate, first, and, then, via holes for interconnecting layers are formed by a photo lithography or laser. Then, copper plating is performed to form a specified circuit pattern and also make the via holes be electrically conductive. Thus, the specified circuit pattern and the insulating resin layer are alternately formed by alternating the insulating resin coating step and the copper plating step, whereby a multilayer printed wiring board is produced.
Along with rapid progress of popularization of mobile phones and personal digital assistances, the low-profile, light-weight and high-density wiring for the printed wiring board is being increasingly demanded.
In the laminate-en-bloc method, since the core substrate used is formed with a cloth or non-woven fabric, it is hard to reduce thickness and weight of the printed wiring board and diameter of the through holes for a high-dense wiring.
On the other hand, in the build-up method, since the cloth or non-woven fabric is not present in the insulating resin layer, the insulating resin layer can be reduced in thickness and via holes can be reduced in diameter. The build-up method has some advantage over the laminate-en-bloc method in the intended purpose of providing a low-profile, light-weight and high-density wiring of a printed wiring board. However, in the build-up method as well, it is still hard to provide a low-profile, light-weight and high-density wiring of the core substrate.
It is the object of the present invention to provide a method of producing a multilayer printed wiring board that can be intended to have low-profile, light-weight and high-density wiring of a printed wiring board, and a multilayer printed wiring board produced by the method of producing a multilayer printed wiring board.
SUMMARY OF THE INVENTION
The present invention provides a novel method of producing a multilayer printed wiring board comprising a step of forming an insulating resin layer on a metal foil; a step of forming a via hole in the insulating resin layer; a step of forming a specified circuit pattern on the insulating resin layer and forming a conductive layer in the via hole, by plating; and a step of etching the metal foil to form it into the specified circuit pattern.
When the double-sided substrate produced by this method is used as a core substrate in lamination by the laminate-en-bloc method or by the build-up method, a multilayer printed wiring board intended to have a low-profile, light-weight and high-density wiring of the printed wiring board can be produced.
In the method of producing a multilayer printed wiring board according to the present invention, it is preferable that the metal foil is made of any of copper or copper alloy containing copper as its primary component, nickel or nickel alloy containing nickel as its primary component, alloy containing nickel and iron as its primary components and stainless steel. Also, it is preferable that the insulating resin layer comprises polyimide.
Further, the present invention includes a multilayer printed wiring board produced in a method of producing a multilayer printed wiring board comprising a step of forming an insulating resin layer on a metal foil; a step of forming a via hole in the insulating resin layer; a step of forming a specified circuit pattern on the insulating resin layer and forming a conductive layer in the via hole, by plating; and a step of etching the metal foil to form it into the specified circuit pattern.
This multilayer printed wiring board can be intended to have a low-profile, light-weight and high-density wiring of a printed wiring board as has been increasingly demanded in recent years.
REFERENCES:
patent: 3352730 (1967-11-01), Murch, Jr. et al.
patent: 5153986 (1992-10-01), Brauer et al.
patent: 5153987 (1992-10-01), Takahashi et al.
patent: 5436062 (1995-07-01), Schmidt et al.
patent: 5495665 (1996-03-01), Carpenter et al.
patent: 5690837 (1997-11-01), Nakano et al.
patent: 5729897 (1998-03-01), Schmidt et al.
patent: 1379558 (1975-01-01), None
patent: 00/46877 (2000-08-01), None
Patent Abstract of Japan, Publication No. 05291727, Publication Date Nov. 5, 1993.
Patent Abstract of Japan, Publication No. 06132630, Publication Date May 13, 1994.
Patent Abstract of Japan, Publication No. 07273466, Publication Date Oct. 20, 1995.
Patent Abstract of Japan, Publication No. 09186454, Publication Date Jul. 15, 1997.
Fujii Hirofumi
Mune Kazunori
Suwa Tokihito
Tanaka Atsushi
Tanigawa Satoshi
Arbes Carl J.
Kubovcik & Kubovcik
LandOfFree
Method of producing multilayer printed wiring board does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of producing multilayer printed wiring board, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of producing multilayer printed wiring board will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3313792