Abrasive tool making process – material – or composition – With inorganic material
Reexamination Certificate
2002-07-23
2004-08-10
Marcheschi, Michael (Department: 1755)
Abrasive tool making process, material, or composition
With inorganic material
C051S308000, C051S309000, C106S003000, C438S692000, C438S693000, C216S105000, C216S106000
Reexamination Certificate
active
06773476
ABSTRACT:
The present invention relates to a polishing composition to be used for polishing substrates for semiconductors, photomasks and various memory hard disks, particularly for polishing for planarization of the surface of device wafers in e.g. semiconductor industry.
More particularly, the present invention relates to a polishing composition which is highly efficient, provides high selectivity and is applicable to formation of excellent polished surface in the polishing of semiconductor devices to which so-called chemical mechanical polishing technology is applied, in the processing of device wafers, and a polishing method employing such a composition.
Progress of computer products has been remarkable in recent years, and parts to be used for such products, such as ULSI devices, have been developed for high integration and high speed, year after year. Along with such progress, the design rule for semiconductor devices has been progressively refined year after year, the depth of focus in a process for producing devices tends to be shallow, and planarization required for the pattern-forming surface tends to be increasingly strict.
Further, to cope with an increase in resistance of the wiring due to refinement of the wiring on the device, it has been studied to employ copper instead of tungsten or aluminum, as the wiring material. By its nature, copper is hardly processable by anisotropic etching, and accordingly, it requires the following process.
Namely, after forming wiring grooves and vias on an insulating layer, copper wirings are formed by sputtering or plating (so-called damascene method), and then an unnecessary copper layer deposited on the insulating layer is removed by chemical mechanical polishing (hereinafter referred to as “CMP”) which is a combination of mechanical polishing and chemical polishing.
However, in such a process, it may happen that copper atoms will diffuse into the insulating layer to deteriorate the device properties. Therefore, for the purpose of preventing diffusion of copper atoms, it has been studied to provide a barrier layer on the insulating layer having wiring grooves or vias formed. As a material for such a barrier layer, metal tantalum or a tantalum-containing compound such as tantalum nitride is most suitable from the viewpoint of the reliability of the device and is expected to be employed mostly in the future. In the present invention, “a tantalum-containing compound” includes not only a compound such as tantalum nitride but also metal tantalum, and “copper” includes not only copper but also a copper alloy with e.g. aluminum.
Accordingly, in such a CMP process for a semiconductor device containing such a copper layer and a tantalum-containing compound, firstly the copper layer as the outermost layer and then the tantalum-containing compound layer as the barrier layer, are polished, respectively, and polishing will be completed when it has reached the insulating layer of e.g. silicon dioxide or monofluoro silicon oxide. As an ideal process, it is desired that by using only one type of a polishing composition, the copper layer and the tantalum-containing compound layer are uniformly removed by polishing in a single polishing step, and polishing will be completed certainly when it has reached the insulating layer.
However, copper and a tantalum-containing compound are different in their hardness, chemical stability and other mechanical properties and accordingly in the processability, and thus, it is difficult to adopt such an ideal polishing process. Accordingly, the following two step polishing process, i.e. polishing process divided into two steps, is being studied.
Firstly, in the first step polishing (hereinafter referred to as the first step polishing), using a polishing composition capable of polishing a copper layer at a high efficiency, the copper layer is polished using e.g. a tantalum-containing compound layer as a stopper until such a tantalum-containing compound layer is reached. Here, for the purpose of not forming various surface damages such as recesses, erosion, dishing, etc., on the copper layer surface, the first step polishing may be terminated immediately before reaching the tantalum-containing compound layer i.e. while a copper layer still slightly remains. Then, in the second step polishing (hereinafter referred to as the second step polishing), using a polishing composition capable of polishing mainly a tantalum-containing compound layer at a high efficiency, the remaining thin copper layer and the tantalum-containing compound layer are polished using the insulating layer as a stopper, and polishing is completed when it has reached the insulating layer.
Here, recesses, erosion and dishing are surface damages due to excessive polishing of the wiring portion. The recesses are meant for dents in the wiring portion (copper in this case), and they are usually caused by a chemical etching action to the wiring portion. The erosion is meant for a phenomenon such that at an aligned copper wiring portion and an insulating portion, the insulating portion is excessively polished as compared with an insulating area portion (a non-aligned portion), and it is usually caused by elastic deformation of a pad, a high stock removal rate of the insulating layer, or an excessive pressure concentration to the insulating portion. The dishing is meant for a phenomenon such that at a copper wiring portion having a relatively wide width, the center portion of the wiring is recessed in a dish shape, and it is usually caused by deformation of a pad.
Along with miniaturization of devices, the cross sectional area of a wiring layer has become small, whereby the above-mentioned surface damages are likely to occur when devices are produced, and the area of the wiring portion will thereby be further reduced, whereby the resistance may increase, or in an extreme case, contact failure may result. Therefore, in the first step polishing, it is important not to permit surface damages to form on the wiring layer, which can not be removed by the second step polishing, while the stock removal rate against the copper layer should not be impaired.
As an example of the polishing composition to be used for such first step polishing, JP-A-7-233485 (prior art 1) discloses a polishing liquid for a copper type metal layer, which comprises at least one organic acid selected from the group consisting of aminoacetic acid (hereinafter referred to as glycine) and amidesulfuric acid, an oxidizing agent and water, and a method for producing a semiconductor device using such a polishing liquid. Further, JP-A-8-83780 discloses an abrasive which contains aminoacetic acid and/or amidesulfuric acid, an oxidizing agent, water and benzotriazole or its derivative, and a polishing method using such an abrasive. When a copper layer is polished by using such a polishing liquid (or an abrasive), a relatively high stock removal rate can be obtained.
However, as a result of the experiments conducted by the present inventors, it has been confirmed that when a wafer having a pattern including a copper wiring formed thereon, is polished by using a polishing liquid simply containing an abrasive, glycine and hydrogen peroxide, chemical etching effect on copper and erosion on the copper surface after the polishing tend to be significant, and formation of recesses on the copper wiring portion tends to be substantial. Further, in a case where benzotriazole having a function to suppress chemical etching effect on copper is incorporated in order to suppress erosion on the copper surface, if the addition amount of benzotriazole is too large, the stock removal rate of the copper layer tends to be significantly low, and the polishing takes long time, such being inefficient. On the other hand, if the addition amount of benzotriazole is too small, no adequate function to suppress chemical etching effect can be obtained, and it is thereby impossible to adequately suppress formation of recesses on the copper wiring portion.
Thus, according to the experiments conducted by the present inventors, it has been
Ina Katsuyoshi
Kitamura Tadahiro
Matsuda Tsuyoshi
Sakai Kenji
Tamai Kazusei
Fujimi Incorporated
Marcheschi Michael
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