Synchronizing signal detection apparatus

Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal

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375365, 3701054, H04L 700

Patent

active

055090362

ABSTRACT:
A synchronizing signal detection apparatus of the present invention comprises a demodulator for digitally demodulating input signals, a partial matching error counter for comparing every bit of the demodulated input signal bit pattern demodulated by said demodulator with a part of the known synchronizing signal bit pattern. The apparatus further comprises a remaining bit matching counter for comparing the input signal bit pattern with remaining bits of the synchronizing signal bit pattern used in the partial matching error counter, or with all synchronizing signal bit pattern, for every bit, when an error bit number, which is compared in the partial matching error counter, is equal or less than a first threshold value. When the error bit number compared in the remaining bits matching error counter is equal or less than a second threshold value, synchronizing signal is assumed to be detected. In the apparatus of the present invention, bit pattern comparison numbers are decreased.

REFERENCES:
patent: 5241568 (1993-08-01), Fernandez et al.

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