Hermetically sealed microstructure package

Details Hermetically sealed microstructure package Hermetically sealed microstructure package

2002-06-05

2004-12-07

Cuneo, Kamand (Department: 2829)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Entirely of metal except for feedthrough

C257S678000, C257S788000, C257S794000, C438S026000, C438S110000, C438S113000

Reexamination Certificate

active

06828674

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to semiconductor devices, and more particularly, to a protective cover arrangement for a semiconductor substrate containing micro-mechanical devices, wherein the cover arrangement offers more desirable protection and manufacturing characteristics.
BACKGROUND OF THE INVENTION
A variety of semiconductor devices may be formed on a substrate according to several known techniques. The semiconductor devices may perform, for examples, electrical, mechanical, optical, or other functions, or combinations of such functions.
Often, a semiconductor wafer serves as a substrate for such devices. The devices may be fabricated from the semiconductor material of the substrate wafer itself using a variety of known processes, such as growth of various material layers on a surface of the substrate, ion implantation, diffusion, oxidation, photolithography, etching and many other processes. During fabrication, typically, at least some portion of each device is formed “within” the substrate wafer, below the surface of the substrate, and may additionally include particular topographic or structural features on the substrate surface.
Alternatively, semiconductor devices may be fabricated from a first semiconductor wafer, and subsequently mounted on a second semiconductor wafer or other type of material that serves as a substrate. The semiconductor devices fabricated from the first wafer may be mounted on the substrate either as individual devices or groups of devices. In this case, the devices “reside on” the substrate, as opposed to being “fabricated from” the substrate, as discussed above.
For purposes of the present invention, either of the foregoing examples of substrates, namely, substrates on which semiconductor devices reside, and/or from which semiconductor devices are fabricated, is referred to as a “device” substrate. A device substrate may include one or a large number of devices.
Many known semiconductor devices are extremely fragile and/or sensitive to environmental hazards. Some examples of such hazards include contamination by dust or other particles, moisture, and inadvertent scratching or other damage to portions of the surface of the devices.
Functional defects may result from one or more environmental hazards, as discussed above, and are a major cause of low device yield and other malperformance characteristics. Device damage due to any number of such hazards may occur, for example, during the process of “dicing” (separating the device substrate into individual devices), as well as during packaging of devices. Often, the number of functioning devices remaining after dicing and packaging is markedly reduced due to defects resulting from environmental hazards.
Various techniques are known in the art for protecting semiconductor devices on a substrate from such hazards. One of these techniques includes bonding a protective semiconductor cap wafer to a device substrate before dicing the substrate into individual devices. This technique has been employed particularly with wafer substrates of semiconductor devices that include micro-machined parts or microscopic mechanisms fabricated on the surface of the substrate, such as micro-electrical-mechanical systems, or MEMS. These devices are also referred to as microstructures.
According to one known technique for protecting semiconductor micro-mechanical devices, an entire device substrate wafer is capped with another wafer using a pattern of glass-like posts called “frit glass” as a bonding agent. In this technique, the micro-mechanical devices are hermetically sealed inside an open cavity formed by the frit glass pattern, the device substrate and the cap wafer. Hermetic sealing refers to a particular standard for sealing that is known in the art. Accordingly, any micro-mechanisms are free to move within a cavity while simultaneously being protected from various environmental hazards, such as particulate contamination.
According to the technique discussed above, the cap wafer is typically another semiconductor wafer of the same type as that used for the device substrate (for example, silicon or gallium arsenide). As a result, the cap wafer has essentially identical thermal characteristics to that of the device substrate. Such a choice of cap wafer results in avoiding most mechanical stresses that may result from a thermal mismatch between the cap wafer and the device substrate. For example, extreme mechanical stress can occur during a high temperature heat treatment necessary to ensure adequate bonding of the frit glass to the cap wafer and the device substrate. Any mechanical stress can severely damage or even destroy the devices on the substrate, and usually would degrade the accuracy of many delicate micro-machined devices, such as microscopic mechanical sensors or other MEMS.
After the micro-mechanism has been protected by wafer capping, the individual devices must be prepared for connection to external circuits. This process consists of separating the individual devices through dividing the substrate into individual devices, called “singulating” or “dicing.” After singulation, the devices are placed into individual containers that provide mechanical protection and electrical connections to the microstructures. This process is called “packaging.” This process of fabricating micro-mechanism packages is time consuming, expensive and results in large devices, as a consequence of processing the individual devices as individual devices.
FIG. 1
shows a cross-sectional view of sheet of devices before singulation.
FIG. 2
shows a cross-sectional view of one of these singulated but unpackaged devices
5
. A microstructure
12
rests on a wafer substrate
10
and is enclosed by glass frits
22
and a cap wafer
20
. The electrical connector
14
connects to the microstructure
12
through the wafer substrate
10
. The singulated device
6
is then connected to a lead frame
8
by the electrical connectors
4
. This is shown in FIG.
3
. This device is then packaged and results in the singulated MEMS package
6
as shown in FIG.
4
. The package
2
surrounds the device
5
while the electrical leads
4
provide an electrical connection from the device
5
to the outside of the package
2
. The package
2
serves to the protect the device
5
from external hazards.
In order to create the individual packaged device
6
, each device
5
needs to be placed in the package
2
individually. The final singulated device package
6
is considerably larger than the singulated device itself
5
.
Accordingly, what is needed, therefore, is improved packaging which still provides the necessary protection, space and connectibility to the microstructure contained inside.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a hermetically sealed wafer scale package for MEMS devices. According to the method and apparatus of one embodiment of the invention, a MBMS substrate wafer with microstructures is hermetically sealed to a cap wafer with fabricated circuitry to form an assembly. The cap wafer is preferably patterned before being attached to the device substrate to form the assembly. A wafer saw is then used to singulate the cap wafer and wire bond is attached to electrically connect the cap wafer to the MEMS wafer. Overmold is then applied to the structure to protect the wire bond. Solder balls are then attached to the cap wafer and the wafer saw is used to singulate the assembly into packaged MEMS devices.


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