Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2002-09-26
2004-11-09
Mai, Son (Department: 2818)
Static information storage and retrieval
Floating gate
Multiple values
C365S185280
Reexamination Certificate
active
06816407
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for storing and reading data in a multilevel nonvolatile memory and to an architecture therefor.
2. Description of the Related Art
According to the most recent market surveys, the most promising applications of nonvolatile memories, in particular EPROM and FLASH memories, in the coming years will mainly regard data storage in the digital audio/video sector, which is currently undergoing a marked expansion.
It is known that the aforesaid applications require increasingly large memories, for example to enable storage of several music pieces on a same medium or to increase the photographic quality (for example, by increasing the number of pixels).
An important design technique therefor includes the possibility of programming each memory cell at a level chosen from among a plurality of levels. At present, the voltage levels usable for programming a cell are binary levels (equal to m, with m=2
n
, where n is the number of information bits that can be stored in the cell). In practice, the law that governs multilevel reading and writing is of a binary type, in so far as memories handle binary data, i.e., at two voltage levels (either high or low, corresponding, from an electrical standpoint, to ground voltage and supply voltage).
Currently memories with two bits per cell, i.e., four-level memories, are in an advanced stage of development and enable doubling of the capacity of the memory. In addition, memories with an even higher number of bits per cell, namely with three or even four bits per cell, corresponding to eight and sixteen levels, are under study. For these memories, above all in the case of sixteen levels, it is very difficult to use the same circuits as for four-level memories; consequently, the time spent in developing products increases considerably, and the know-how acquired remains unexploited. In fact, from the standpoints of the design and engineering development, multilevel architecture is very burdensome.
In order to prevent the need for technical staff to continue to develop products that involve so much expenditure, it is therefore preferable to develop architectures that exploit prior know-how to the full, enabling the design of multilevel memories to advance by short steps and departing as little as possible from the prior art.
BRIEF SUMMARY OF THE INVENTION
An embodiment of the present invention provides a management method and an architecture that allow an increase in the storage capacity of a nonvolatile memory, without requiring complete re-design of the memory with respect to the prior art. The method for stores data in a multilevel storage device that includes a plurality of memory locations, each of which can be programmed at a plurality of voltage levels. The method includes programming each of the memory locations at any of N voltage levels, where N is a non-power of two, depending on where a value for storage in the memory location falls among N-
1
thresholds.
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Iannucci Robert
Mai Son
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