Special interconnect layer employing offset trace layout for adv

Details Special interconnect layer employing offset trace layout for adv Special interconnect layer employing offset trace layout for adv

1993-09-21

1996-04-16

Teska, Kevin J.

Boots, shoes, and leggings

364491, 437195, 257700, G06F 1500, H01L 2348

Patent

active

055089380

ABSTRACT:
A multi-layer printed wiring board design method employs establishing of critical and non-critical signal layers with first and second design rule sets assigned respectively. A configuration employing y x y' layers wherein conductors in the y and y' layers are orthogonal to x layers and y' layers are offset by approximately one-half pitch from y layers for cross talk reduction.

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