Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2003-03-24
2004-11-16
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S106000, C438S110000, C438S113000
Reexamination Certificate
active
06818473
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating ceramic chip packages, and more particularly to a method for fabricating ceramic chip packages in which an epoxy resin containing fine ceramic particles is applied on a ceramic substrate provided with a plurality of chips mounted thereon, thereby protecting the chips mounted on the substrate from external stresses and improving reliability and endurance of the fabricated ceramic chip packages.
2. Description of the Related Art
Generally, semiconductor devices are packaged and the semiconductor device packages are mounted on a printed circuit board. The package is constructed so that terminals of the semiconductor device of the package are easily connected to signal patterns of the printed circuit board, and serves to protect the semiconductor device from external stresses so as be improved in reliability. Recently, the semiconductor device package is more and more miniaturized so as to meet miniaturization trends of electronic products. Therefore, in order to satisfy the trend toward miniaturization, a chip scale package has been developed.
FIG. 1
is a schematic cross-sectional view illustrating a process for fabricating a conventional chip scale package. As shown in
FIG. 1
, a plurality of chips
2
are mounted on a ceramic substrate
1
. The upper surface of the ceramic substrate
1
provided with the chips
2
mounted thereon is covered with a metal lid
3
so as to protect the chips
2
from external stresses, thereby being completed as a package
4
. Herein, the metal lid
3
may serve as a ground in forming signal patterns of the substrate
1
.
As shown in
FIG. 1
, in the conventional ceramic chip package
4
, the metal lid
3
attached to the upper surface of the substrate
1
has a large height (t) of approximately 800 &mgr;m from the upper surface of the substrate
1
. In case the height (t) of the metal lid
3
is decreased, the bottom surface of the metal lid
3
is attached to the upper surfaces of the chips
2
, thereby generating a problem of insufficient insulation between the metal lid
3
and the chips
2
. Therefore, in order to electrically insulate the metal lid
3
from the chips
2
, an insulating material must be applied on the upper surfaces of the chips
2
. In case the chips mounted on the substrate
1
are diodes, since the height of the diode from the upper surface of the substrate
1
is approximately 550 &mgr;m, in order to avoid the aforementioned insufficient insulation problem, the metal lid
3
must have a height t of approximately 800 &mgr;m.
However, electronic devices and systems recently show a tendency to become smaller, thinner, and lighter, i.e., miniaturized. Under this condition, the greater height of the metal lid
3
of the conventional ceramic chip package
4
is an obstruction of the miniaturization trend, thereby increasing the total thickness of an electronic part including the ceramic chip package
4
. Further, it is only limitedly possible to reduce the thickness of the metal lid, thereby limiting the miniaturization of the ceramic chip package. Moreover, conventionally, since the metal lid is individually attached to each substrate of the plural packages in a step for manufacturing parts made of ceramic, the productivity of a finished product is deteriorated. Besides, the conventional metal lid attached to the upper surface of the substrate deteriorates the reliability and the endurance of the product against moisture and heat.
Therefore, there is required a chip package with a micro size and simple structure, which is easily fabricated and not limited to its total thickness.
SUMMARY OF THE INVENTION
Therefore, the present invention has been made in view of the above problems, and it is an object of the present invention to provide a method for fabricating ceramic chip packages in which an epoxy resin containing fine ceramic particles is applied on a ceramic substrate so as to protect plural chips mounted on the ceramic substrate from external stresses, thereby improving the reliability and the endurance of the package.
It is another object of the present invention to provide a method for fabricating ceramic chip packages, in which the total thickness of the package is reduced and the production process of the packages is simple.
In accordance with one aspect of the present invention, the above and other objects can be accomplished by the provision of a method for fabricating ceramic chip packages comprising the steps of: (i) preparing a ceramic substrate provided with a plurality of chips mounted thereon and grouped into a plurality of packages; (ii) forming an epoxy resin layer on the ceramic substrate except a designated region selected from an area without chips mounted thereon so as to cover the chips; (iii) hardening the epoxy resin layer; and (iv) dicing the ceramic substrate into a plurality of the packages.
Preferably, the epoxy resin layer may contain SiO
2
, and have a uniform thickness and a flat upper surface. Further, preferably, the epoxy resin layer may be formed on the ceramic substrate by forming a first epoxy resin layer on the ceramic substrate at the same thickness as the height of each of the chips mounted on the ceramic substrate, and by forming a second epoxy resin layer so as to cover the chips and the first epoxy resin layer. The first epoxy layer serving as a dam may be formed using an epoxy resin with a viscosity higher than that of the second epoxy resin by approximately 10 poises. Moreover, preferably, the designated region without the epoxy resin layer may be formed on the center of the ceramic substrate.
In accordance with another aspect of the present invention, there is provided a method for fabricating ceramic chip packages comprising the steps of: (i) preparing a ceramic substrate provided with a plurality of chips mounted thereon and grouped into a plurality of packages; (ii) stacking on the ceramic substrate a dam member provided with openings corresponding to the packages of the ceramic substrate so that the packages of the ceramic substrate are exposed to the outside by the corresponding openings of the dam member; (iii) forming an epoxy resin layer on the exposed upper surface of the packages from the dam member so as to cover a plurality of the chips; (iv) hardening the epoxy resin layer; and (v) dicing the ceramic substrate into a plurality of the packages.
Preferably, in the step (v), the ceramic substrate may be diced into a plurality of the packages, each package including the dam member attached to its edge. Alternatively, in the step (v), the ceramic substrate may be diced into a plurality of the packages, each package not including the dam member attached to its edge. Further, preferably, the ceramic substrate may be attached to the dam member by the epoxy resin layer. A total thickness of the chip package may be controlled by adjusting a thickness of the dam member.
Moreover, the dam member may be formed by stacking a plurality of ceramic sheets formed by a punching method, and protrusions and/or depressions may be formed on the inner side walls of the openings of the dam member. The dam member may be made of a ceramic material, a molded organic material (plastics), or a metal material (aluminum, stainless steel, etc).
REFERENCES:
patent: 5776798 (1998-07-01), Quan et al.
patent: 6512288 (2003-01-01), Shin et al.
Choi Ik Seo
Kim Chul Ho
Kim Joon II
Elms Richard
Lowe Hauptman & Gilman & Berner LLP
Owens Beth E.
Samsung Electro-Mechanics Co. Ltd.
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