Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2002-09-30
2004-11-09
Nadav, Ori (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257S018000, C257S192000
Reexamination Certificate
active
06815707
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to field-effect type semiconductor devices and more particularly to a technique effectively applicable to a field-effect type semiconductor device for high-frequency power amplification of not less than 800 MHz used in a mobile communication unit.
With widespread use of a mobile communication terminal in recent years, a power amplifier for portable terminal of lower power consumption and higher efficiency has been demanded increasingly. For a power amplification device directed to this utilization, a transistor (HBT) using a compound semiconductor (HBT) or an insulated gate field-effect transistor (Si-MOSFET) using a silicon semiconductor (Si) has been used.
A power amplifier using the compound semiconductor is described in, for example, IEEE Journal of Solid-state Circuits, Volume:35 Issue:8, pp.1109-1120 (2000) (reference 1).
On the other hand, a power amplifier using the Si-MOSFET is detailed in, for example, IEDM99 Technical Digest (1999), pp.205-208 (reference 2) or US 2001/0012671 A1 (reference 3).
Incidentally, a phenomenon that the mobility can be increased by using strained Si or SiGe alloy is indicated in J. Appl. Phys. 80 (1996), pp. 2234-2252 (reference 4), for instance.
Further, a method of promoting the performance of a transistor (MOSFET) in an IC (specifically, CMOSIC) by using this phenomenon is disclosed in, for example, JP-A-10-270685 (reference 5) or US 2001/0003364 A1 (reference 6).
In the technique described in reference 5, for the purpose of obtaining characteristics of such high performance as having high transconductance in low voltage operation, an nMOS transistor and a pMOS transistor, each having a LDD structure, are formed in a silicon layer in which strain is applied (the so-called strained Si layer).
Also, in the technique described in reference 6, for the purpose of obtaining a complementary field-effect transistor capable of operating at a high speed and reducing power consumption, an nMOS transistor is formed in a strained silicon layer and a pMOS transistor is formed in a strained silicon/germanium layer.
SUMMARY OF THE INVENTION
The application of the compound semiconductor has raised a problem of an expensive unit price of wafer.
On the other hand, when the silicon semiconductor (Si) disclosed in reference 3 is applied, the wafer unit price is cheaper than that in the case of the compound semiconductor. In addition, the existing Si process technology can be applied to advantage.
However, because of a limited property of matter of Si, the efficiency can only be increased limitedly. More specifically, for promotion of the performance of the Si-MOSFET, decreasing the gate oxide film thickness and shortening the channel length have hitherto been effective but such scaling as above has not at last be connected directly to the performance promotion. In other words, the more the scaling advances, the more the effective mobility in the channel decreases. This is because a strong electric field is applied to an interface to the gate oxide film and consequently, the carrier density increases and scattering of carriers are accelerated. As a result, carriers are pressed against the interface to the gate oxide film, and scattering of carriers increases to decrease the carrier mobility. Accordingly, the channel conductance having control of the performance of the Si-MOSFET can be decreased only limitedly.
In order to improve the effective mobility, control of impurity profile responsible for relaxing the electric field in the channel, for example, is conceivable but owing to the limited threshold voltage and a limited decrease in the power supply voltage (at present, 3.5V of lithium battery), especially, in the case of a high-frequency power MOSFET, the expedient as above has failed to play an eminent role in performance improvement.
The present inventors have studied the techniques disclosed in the aforementioned references 5 and 6 from the viewpoint of means for improving the effective mobility.
The techniques disclosed in the references 5 and 6 are directed to transistors of low voltage/low power that are practiced in complementary field-effect transistors (CMOSFET's) constituting a logic circuit. In the CMOSFET's, SiGe alloy and strained Si of the same conductivity-type are formed on an ordinary Si substrate (having a resistivity of the order of about one ohm·cm) so as to be practiced at sufficiently low supply voltages.
However, it has been clarified by the present inventors that when the SiGe alloy and strained Si disclosed in references 5 and 6 are simply used in the channel portion in the high-frequency power MOSFET described in reference 3, promotion of the performance of the high-frequency power amplification MOSFET required of high drain breakdown voltage cannot be attained.
More specifically, the application of the SiGe alloy layer onto the low-resistance substrate (P
+
-type substrate) with a view to improving the carrier mobility in the channel portion in the high-frequency power MOSFET described in reference 3 is equivalent to an idea of epitaxially growing high-resistance SiGe (P
−
SiGe) on the P
+
-type substrate. In case SiGe having a lattice constant different from that of the substrate is grown on the Si substrate, a region containing a large quantity of crystal defects is always formed near the interface between the SiGe layer and the Si substrate. Namely, if a high-frequency power MOSFET is fabricated by using the substrate containing the SiGe layer and the strained Si, a depletion layer present in the P
−
-SiGe layer is liable to extend, so that the depletion layer reaches the crystal defect region and leakage current tends to occur between the drain and source. The leakage current in the crystal defect region causes the power consumption to increase and the breakdown voltage to decrease, thus making it difficult to improve the performance of the high-frequency power MOSFET.
It is an object of the invention to provide a technique of improving the transconductance while assuring breakdown voltage in a high-frequency power semiconductor device.
Another object of the invention is to provide a technique of reducing size and weight of a high-frequency power amplifier.
The above and other objects and novel features of the present invention will become apparent taken in conjunction with a description of the present specification and the accompanying drawings.
According to one aspect of the invention, a field-effect type semiconductor device for power amplification comprises a semiconductor multi-layer structure in which a first SiGe layer having a first conductivity-type and relatively high impurity concentration, a second SiGe layer having the first conductivity-type and relatively low impurity concentration and a Si layer having the first conductivity type and relatively low impurity concentration are sequentially formed on one major surface of a Si substrate having the first conductivity-type, wherein a gate electrode is formed on a major surface of the semiconductor multi-layer structure through a gate insulating film, a source region and a drain region each having a second conductivity-type are so formed in the second SiGe layer as to sandwich the Si layer underlying the gate electrode and serving as a channel forming region, and a reach-through layer electrically connected to the source region is so formed as to pass through the second SiGe layer and reach the first SiGe layer.
With the above construction, the region containing a large quantity of crystal defects (dislocation) caused by bonding different lattice sizes is so conditioned as to be confined in the first SiGe layer of relatively high impurity concentration. The depletion layer extending from the drain region sufficiently expands until the first SiGe layer of relatively low impurity concentration and when it comes to the first SiGe layer of high impurity concentration, its expansion is suppressed. Therefore, the depletion layer will not expand to the region containing the large qua
Morikawa Masatoshi
Sugii Nobuyuki
Washio Katsuyoshi
Yoshida Isao
Mattingly Stanger & Malur, P.C.
Nadav Ori
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