Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal
Reexamination Certificate
2000-10-25
2004-06-08
Philippe, Gims (Department: 2613)
Pulse or digital communications
Bandwidth reduction or expansion
Television or motion video signal
C382S236000, C348S423100
Reexamination Certificate
active
06748020
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a digital video transcoder architecture.
The following acronyms and terms are used:
AC—Alternating Current (DCT coefficient)
ALU—Arithmetic Logic Unit
B—Bidirectionally-predictive coded (MPEG)
Back.—Backward (MPEG)
BSP—Bitstream Processor
CBP—Coded Block Pattern (MPEG)
CBR—Constant Bit Rate
Chan.—Channel
CPU—Central Processing Unit
D$—Data cache
DC—Direct Current (DCT coefficient)
DCT—Discrete Cosine Transform
DMA—Direct Memory Access
DPCM—Differential Pulse Code Modulation
DPRAM—Dual Port RAM
DS—Data Streamer
DTS—Decode Time Stamp
FIFO—First-In, First-Out
FIR—Finite Impulse Response
FPGA—Field-Programmable Gate Array
Fwd.—Forward (MPEG)
H/V—Horizontal/Vertical
HW—Hardware
I—Intra-coded (MPEG) or Integer
I$—Instruction cache
I/F—Intermediate Frequency
I
2
C—IIC—Inter-integrated circuit (a serial bus standard)
I
2
S—IIS—Inter-IC sound (a 3-wire digital stereo PCM audio interconnect)
iBlk—Input block FIFO
IDCT—Inverse DCT
IEC—International Electro-mechanical Commission
IFG—Integer, Floating point & Graphics (as in IFG-ALU); an Equator acronym
IG—Integer, Graphics unit
iMB—Input macroblock FIFO
Info.—Information
Int.—Interface
iRB—Input rate buffer
ISR—interrupt service routine
ITU—International Telecommunications Union
JTAG—Joint Test Action Group (IEEE 1149.1 protocol)
KB—Kilobyte
LRU—least recently used (a cache line replacement algorithm)
MAP—Media Accelerated Processor (Equator)
MB—Megabyte or Macroblock
MC—Motion Compensation
MTS—MPEG Transport Stream
MUX—Multiplexer
NC—Non-coherent Connect
NOP—No Operation
NTSC—National Television Standards Committee
oBlk—Output block FIFO
oMB—Output macroblock FIFO
oRB—Output rate buffer
P—Predictive-Coded (MPEG)
PCR—Program Clock Reference (MPEG)
PES—Packetized Elementary Stream (MPEG)
Pic.—Picture
PID—Packet Identifier
PTS—Presentation Time Stamp (MPEG)
QL—Quantization Level
RAM—Random Access Memory
RAMDAC—RAM Digital-to-Analog Converter
Ref.—Reference
Reg.—Register
RGB—Red Green Blue
RISC—Reduced Instruction Set Computer
RL—Run Length (or run-level pair)
ROM—Read-Only Memory
RTOS—Real-Time Operating System
Rx—Receiver
SAV—Start of Active Video
SC—Start Code
SDRAM—Synchronous Dynamic Random Access Memory
SGRAM—Synchronous Graphics Random Access Memory
SIMD—Single Instruction, Multiple Data
Svc.—Service
SW—Software
T
1
—A US telephony digital line standard with a data rate of 1.544 Mbps
TCI—Transport Channel Input
TLB—Translation Lookaside Buffer (part of MMU)
TMC—Transcoder Multiplexer Core
TPE—Transcoder Processing Element
T-STD—Transport System Target Decoder
tVLD—Transcoder VLD
tVLE—Transcoder VLE
Tx—Transmitter
VBV—Video Buffer Verifier (MPEG)
VLD—Variable-Length Decoding
VLE—Variable-Length Encoding
VLIW—Very Long Instruction Word
The transmission of digital video data, e.g., via broadband communication systems such as cable television or satellite television networks has become increasingly popular. Source video sequences can be pre-encoded at any rate, which may be a constant bit rate (CBR) or variable bit rate (VBR), to form pre-compressed or live bitstreams. For many applications, however, the pre-compressed bitstreams must correspond with only specific allowable, or otherwise desirable, formats and bit rates. Accordingly, a transcoder is used to change the bit rate, format or other characteristics of the video data prior to communicating it, e.g., to a set-top box and/or some intermediate point in a network.
A number of transcoders are often used in a statistical multiplexer that receives a number of compressed bitstreams, decompresses the bitstreams (at least partially), then recompresses them at a different rate by allocating a quantization parameter based on some statistical property of the bitstreams such as picture complexity.
The bitstreams are typically compressed according to a known video coding standard, such as MPEG.
A transmux refers to a combination of multiple single-service video transcoders and a statistical multiplexer that dynamically sets the video bit rate. Usually, this is done to perceptually equalize the quality of the video services within a statmux group, i.e., allocate more bits to services containing a difficult-to-compress video, and fewer bits to services containing easier-to-compress video.
However, the development of a transmux architecture must address various needs. In particular, it would be desirable to provide transmux architecture that is fully software implemented. This provides great flexibility by allowing the transmux functions to be changed in the field (e.g., at cable television headends and the like) by only changing the software rather than the hardware. The architecture is also suitable for use in computer networks such as the Internet.
This is advantageous since it allows upgrading of transmuxes to handle new functions, fix hardware or software problems (“bugs”), test new processes, adapt to changing customer requirements, and so forth. These tasks are all easier with a “soft” (software-based) transmux.
Moreover, savings in design time and expenses can result.
The transmux should provide a good computational efficiency and allow a relatively small physical size (footprint).
The transmux should be implementable using a readily-available media processor, such as a VLIW media processor.
The transmux should perform full transcoding, including keeping track of frame-to-frame requantization errors.
The transmux should provide scheduling of multiple transcoding threads (including buffer management, processor management, and the like) with combinations of both transcoded video PIDs and pass-thru data/audio services on a single processor without the use of a RTOS.
The transmux should use a load balancing algorithm, specific to the transcoding task, for keeping a VLIW processor and co-processor from waiting on each other, and to obtain high levels of computational throughput.
The transmux should provide decomposition of a transcoding algorithm into components which run on a VLIW processor and a co-processors subject to co-processor memory constraints, instruction cache size and data cache size.
The transmux should provide case-wise specialization of a simplified transcoding algorithm to the different MPEG-2 picture types (I, P or B) and macroblock coding type (intra-coded or inter-coded), and account for whether the quantization step size increases or decreases during transcoding.
The transmux should provide an overall software architecture for a transcoder processor element (TPE).
The present invention provides a transmux design having the above and other advantages.
SUMMARY OF THE INVENTION
The present invention relates to a digital video transmux architecture.
A transcoding process in accordance with the invention can be decomposed into the following five steps. A VLIW core processing resource and a BSP processing resource are allocated for the different steps as indicated. The BSP handles the sequential bitstream packing and unpacking tasks. On the MAP-2000CA, the BSP is VLx co-processor
131
, which is a VLD/VLE co-processor, although similar devices from other suppliers may be used. The BSP runs multiple transcoding VLE and VLD threads (processing loops). A corresponding architecture is shown in FIG.
1
(
a
).
a) MPEG transport stream decoding (on VLIW core) (
10
)
b) MPEG video elementary stream variable length decoding (VLD) (on BSP) (
20
)
c) Core transcoding (on VLIW core) (
30
), consisting generally of
c.
1
) inverse quantization (of VLD output)
c.
2
) spatial error motion compensation (and addition to IDCT out)
c.
3
) forward DCT of motion compensated error
c.
4
) add error (now in DCT domain) to inverse quantize results)
c.
5
) forward quantization (to form the VLE input)
c.
6
) inverse quantize VLE input and subtract from fwd. quant. input to form cumulative error in DCT domain
c.
7
) inverse DCT of error to form spatial error. This error is stored in reference frame buffer to be used in future pictures (step c.
2
) which reference this image.
d) MPEG video elementary stream variable length encoding (VLE) (on BSP)
Chen Xuemin
Eifrig Robert O.
Ling Fan
General Instrument Corporation
Lipsitz Barry R.
McAllister Douglas M.
Philippe Gims
LandOfFree
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