CMOS output buffer with reduced L-DI/DT noise

Details CMOS output buffer with reduced L-DI/DT noise CMOS output buffer with reduced L-DI/DT noise

1996-03-28

1998-01-13

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

327379, 327108, H03K 1716

Patent

active

057083860

ABSTRACT:
An output buffer is provided with a terminal, a first driver, a second driver and enable circuitry. The first driver is for driving the terminal to a voltage corresponding to a logic value of the output signal. The second driver is for driving the terminal to the same voltage as the first driver, when the output signal transitions in logic value. The enable circuitry responds to a transition in logic value of the output signal by, after a predetermined delay, enabling the second driver to drive the terminal. However, the enable circuitry only enables the second driver to drive the terminal for a predetermined time period.

REFERENCES:
patent: 4731553 (1988-03-01), Van Lehn et al.
patent: 4777389 (1988-10-01), Wu et al.
patent: 4825101 (1989-04-01), Walters, Jr.
patent: 4829199 (1989-05-01), Prater
patent: 5063308 (1991-11-01), Borlear
patent: 5241221 (1993-08-01), Fletcher et al.
patent: 5517129 (1996-05-01), Matsui

Affiliated with

Also associated with

Rating

CMOS output buffer with reduced L-DI/DT noise does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CMOS output buffer with reduced L-DI/DT noise, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMOS output buffer with reduced L-DI/DT noise will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-329671